{"id":"https://openalex.org/W2559726587","doi":"https://doi.org/10.1109/asap.2016.7760792","title":"Real time all intra HEVC HD encoder on FPGA","display_name":"Real time all intra HEVC HD encoder on FPGA","publication_year":2016,"publication_date":"2016-07-01","ids":{"openalex":"https://openalex.org/W2559726587","doi":"https://doi.org/10.1109/asap.2016.7760792","mag":"2559726587"},"language":"en","primary_location":{"id":"doi:10.1109/asap.2016.7760792","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2016.7760792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5087206510","display_name":"Sachille Atapattu","orcid":null},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Sachille Atapattu","raw_affiliation_strings":["Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072122283","display_name":"Namitha Liyanage","orcid":"https://orcid.org/0009-0003-7075-9071"},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Namitha Liyanage","raw_affiliation_strings":["Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5109346221","display_name":"Nisal Menuka","orcid":null},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Nisal Menuka","raw_affiliation_strings":["Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5014496057","display_name":"Ishantha Perera","orcid":null},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Ishantha Perera","raw_affiliation_strings":["Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5071939695","display_name":"Ajith Pasqual","orcid":"https://orcid.org/0000-0001-9728-9098"},"institutions":[{"id":"https://openalex.org/I195740183","display_name":"University of Moratuwa","ror":"https://ror.org/0491f5305","country_code":"LK","type":"education","lineage":["https://openalex.org/I195740183"]}],"countries":["LK"],"is_corresponding":false,"raw_author_name":"Ajith Pasqual","raw_affiliation_strings":["Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Dept. of Electronic and Telecommunication Engineering, University of Moratuwa, Sri Lanka","institution_ids":["https://openalex.org/I195740183"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I195740183"],"apc_list":null,"apc_paid":null,"fwci":1.3193,"has_fulltext":false,"cited_by_count":16,"citation_normalized_percentile":{"value":0.82520219,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"191","last_page":"195"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10741","display_name":"Video Coding and Compression Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10531","display_name":"Advanced Vision and Imaging","score":0.9958000183105469,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8743209838867188},{"id":"https://openalex.org/keywords/encoder","display_name":"Encoder","score":0.7798824310302734},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6388504505157471},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5348414778709412},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.5021860599517822},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.4852728545665741},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.33488401770591736},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3256966769695282},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3201698064804077},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.17088031768798828}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8743209838867188},{"id":"https://openalex.org/C118505674","wikidata":"https://www.wikidata.org/wiki/Q42586063","display_name":"Encoder","level":2,"score":0.7798824310302734},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6388504505157471},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5348414778709412},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.5021860599517822},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.4852728545665741},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.33488401770591736},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3256966769695282},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3201698064804077},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.17088031768798828},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asap.2016.7760792","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2016.7760792","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 IEEE 27th International Conference on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1968988164","https://openalex.org/W1973060612","https://openalex.org/W1981542807","https://openalex.org/W1987889859","https://openalex.org/W1998857843","https://openalex.org/W2033391823","https://openalex.org/W2040830471","https://openalex.org/W2045960232","https://openalex.org/W2060800149","https://openalex.org/W2080280664","https://openalex.org/W2082301295","https://openalex.org/W2155294987"],"related_works":["https://openalex.org/W2111241003","https://openalex.org/W2364622490","https://openalex.org/W4301373716","https://openalex.org/W1950940422","https://openalex.org/W4283822356","https://openalex.org/W2129146436","https://openalex.org/W2032507829","https://openalex.org/W2147282173","https://openalex.org/W2366163563","https://openalex.org/W2163885456"],"abstract_inverted_index":{"Higher":[0],"compression":[1],"efficiency":[2],"in":[3,76,91,110],"HEVC":[4,56],"encoders":[5],"comes":[6],"with":[7,189],"increased":[8],"computational":[9],"complexity,":[10],"making":[11],"real":[12,77,88,186],"time":[13,78,89,187],"encoding":[14,90,188],"of":[15,52,194],"high":[16],"resolution":[17],"videos":[18],"a":[19,131,157,190],"challenging":[20],"task.":[21],"This":[22,44],"challenge":[23],"can":[24,59,176,184],"be":[25,108],"addressed":[26],"by":[27,98,156],"software,":[28],"yet":[29],"hardware":[30,50],"solutions":[31],"are":[32],"more":[33],"appealing":[34],"due":[35],"to":[36,87,107,113,136],"their":[37],"superior":[38],"performance":[39],"and":[40,119,140,148,166,181,204],"low":[41,81],"power":[42],"consumption.":[43],"paper":[45],"presents":[46],"an":[47,53],"FPGA":[48],"based":[49,123,159],"implementation":[51],"all":[54],"intra":[55],"encoder,":[57],"which":[58],"encode":[60],"8":[61],"bits":[62],"per":[63,69],"sample,":[64],"1920\u00d71080":[65],"resolution,":[66],"30":[67],"frames":[68],"second":[70],"raw":[71],"video,":[72],"that":[73],"is":[74,94,154],"viable":[75],"even":[79],"at":[80,178],"operating":[82,192],"frequencies.":[83],"A":[84],"major":[85],"obstacle":[86],"available":[92],"architectures":[93],"the":[95,115,125,182],"dependency":[96],"created":[97],"reference":[99],"generation.":[100],"Moreover,":[101],"each":[102],"coding":[103],"unit":[104],"(CU)":[105],"has":[106],"processed":[109],"multiple":[111],"configurations":[112],"determine":[114],"most":[116],"efficient":[117],"split":[118,147],"prediction":[120,149],"mode":[121],"representation,":[122],"on":[124,209],"bit":[126],"stream":[127],"generated.":[128],"We":[129],"propose":[130],"new":[132],"three":[133],"stage":[134],"architecture":[135],"reduce":[137],"these":[138],"dependencies":[139],"increase":[141],"parallelism.":[142],"Feedback":[143,163],"needed":[144],"for":[145],"CU":[146],"direction":[150],"decision":[151,161],"from":[152],"binarization":[153],"avoided":[155],"Hadamard":[158],"early":[160],"method.":[162],"constrained":[164],"coefficient":[165],"reconstruction":[167],"derivation":[168],"module":[169],"exploits":[170],"several":[171],"optimization":[172],"techniques.":[173],"All":[174],"modules":[175],"operate":[177],"200":[179],"MHz":[180],"encoder":[183],"achieve":[185],"minimum":[191],"frequency":[193],"140":[195],"MHz.":[196],"The":[197],"design":[198],"consumes":[199],"83K":[200],"LUTs,":[201],"28K":[202],"registers,":[203],"34":[205],"DSPs":[206],"when":[207],"implemented":[208],"Xilinx":[210],"Zynq":[211],"ZC706.":[212]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":3},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":1},{"year":2018,"cited_by_count":2},{"year":2017,"cited_by_count":3}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
