{"id":"https://openalex.org/W1517090753","doi":"https://doi.org/10.1109/asap.2015.7245701","title":"Timing speculation-aware instruction set extension for resource-constrained embedded systems","display_name":"Timing speculation-aware instruction set extension for resource-constrained embedded systems","publication_year":2015,"publication_date":"2015-07-01","ids":{"openalex":"https://openalex.org/W1517090753","doi":"https://doi.org/10.1109/asap.2015.7245701","mag":"1517090753"},"language":"en","primary_location":{"id":"doi:10.1109/asap.2015.7245701","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2015.7245701","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100710897","display_name":"Tanvir Ahmed","orcid":"https://orcid.org/0000-0002-3873-3993"},"institutions":[{"id":"https://openalex.org/I90023481","display_name":"National Institute of Information and Communications Technology","ror":"https://ror.org/016bgq349","country_code":"JP","type":"facility","lineage":["https://openalex.org/I90023481"]},{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Tanvir Ahmed","raw_affiliation_strings":["Dept. of Communications & Computer Engineering, Tokyo Institute of Technology"],"affiliations":[{"raw_affiliation_string":"Dept. of Communications & Computer Engineering, Tokyo Institute of Technology","institution_ids":["https://openalex.org/I90023481","https://openalex.org/I114531698"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5065843430","display_name":"Yuko Hara\u2013Azumi","orcid":"https://orcid.org/0000-0001-9486-5272"},"institutions":[{"id":"https://openalex.org/I114531698","display_name":"Tokyo Institute of Technology","ror":"https://ror.org/0112mx960","country_code":"JP","type":"education","lineage":["https://openalex.org/I114531698"]},{"id":"https://openalex.org/I90023481","display_name":"National Institute of Information and Communications Technology","ror":"https://ror.org/016bgq349","country_code":"JP","type":"facility","lineage":["https://openalex.org/I90023481"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yuko Hara-Azumi","raw_affiliation_strings":["Dept. of Communications & Computer Engineering, Tokyo Institute of Technology","JST, PRESTO"],"affiliations":[{"raw_affiliation_string":"Dept. of Communications & Computer Engineering, Tokyo Institute of Technology","institution_ids":["https://openalex.org/I90023481","https://openalex.org/I114531698"]},{"raw_affiliation_string":"JST, PRESTO","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5100710897"],"corresponding_institution_ids":["https://openalex.org/I114531698","https://openalex.org/I90023481"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.02225827,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"30","last_page":"34"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10933","display_name":"Real-Time Systems Scheduling","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.8461868762969971},{"id":"https://openalex.org/keywords/executable","display_name":"Executable","score":0.7883659601211548},{"id":"https://openalex.org/keywords/microarchitecture","display_name":"Microarchitecture","score":0.6022128462791443},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.5835278630256653},{"id":"https://openalex.org/keywords/extension","display_name":"Extension (predicate logic)","score":0.5267809629440308},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.509903073310852},{"id":"https://openalex.org/keywords/speedup","display_name":"Speedup","score":0.48315876722335815},{"id":"https://openalex.org/keywords/set","display_name":"Set (abstract data type)","score":0.45931628346443176},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.43888476490974426},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.4268740117549896},{"id":"https://openalex.org/keywords/software","display_name":"Software","score":0.42000776529312134},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.4135953485965729},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.358295202255249},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.2526857554912567},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.21730133891105652}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.8461868762969971},{"id":"https://openalex.org/C160145156","wikidata":"https://www.wikidata.org/wiki/Q778586","display_name":"Executable","level":2,"score":0.7883659601211548},{"id":"https://openalex.org/C107598950","wikidata":"https://www.wikidata.org/wiki/Q259864","display_name":"Microarchitecture","level":2,"score":0.6022128462791443},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.5835278630256653},{"id":"https://openalex.org/C2778029271","wikidata":"https://www.wikidata.org/wiki/Q5421931","display_name":"Extension (predicate logic)","level":2,"score":0.5267809629440308},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.509903073310852},{"id":"https://openalex.org/C68339613","wikidata":"https://www.wikidata.org/wiki/Q1549489","display_name":"Speedup","level":2,"score":0.48315876722335815},{"id":"https://openalex.org/C177264268","wikidata":"https://www.wikidata.org/wiki/Q1514741","display_name":"Set (abstract data type)","level":2,"score":0.45931628346443176},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.43888476490974426},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.4268740117549896},{"id":"https://openalex.org/C2777904410","wikidata":"https://www.wikidata.org/wiki/Q7397","display_name":"Software","level":2,"score":0.42000776529312134},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.4135953485965729},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.358295202255249},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.2526857554912567},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.21730133891105652},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asap.2015.7245701","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2015.7245701","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 IEEE 26th International Conference on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1491178396","https://openalex.org/W2046580775","https://openalex.org/W2050684782","https://openalex.org/W2058092201","https://openalex.org/W2104677471","https://openalex.org/W2117213647","https://openalex.org/W2129542184","https://openalex.org/W2151845324","https://openalex.org/W2157906244","https://openalex.org/W2162278060","https://openalex.org/W3147349573","https://openalex.org/W4236432903","https://openalex.org/W4248445118","https://openalex.org/W6629325410"],"related_works":["https://openalex.org/W2045177269","https://openalex.org/W2116582200","https://openalex.org/W122453572","https://openalex.org/W1580752477","https://openalex.org/W4250432526","https://openalex.org/W1998013902","https://openalex.org/W2101536355","https://openalex.org/W1980898636","https://openalex.org/W2045325972","https://openalex.org/W2141090099"],"abstract_inverted_index":{"Performance,":[0],"area,":[1],"and":[2,13,121,164,172,178],"power":[3,51],"are":[4,40],"important":[5],"issues":[6],"for":[7,44,69,128],"many":[8],"embedded":[9,45,73,147],"systems.":[10,74],"One":[11],"area-":[12,151],"power-efficient":[14,92],"way":[15],"to":[16,76,146],"improve":[17],"performance":[18],"is":[19,139],"instruction":[20,105],"set":[21],"architecture":[22],"(ISA)":[23],"extension.":[24],"Although":[25],"existing":[26],"works":[27],"have":[28],"introduced":[29],"application-specific":[30],"accelerators":[31],"co-operating":[32],"with":[33,47,91,111,149,170,183],"a":[34],"basic":[35,60,84],"processor,":[36],"most":[37],"of":[38,54,135],"them":[39],"still":[41],"not":[42],"suitable":[43],"systems":[46,148],"stringent":[48,150],"resource":[49],"and/or":[50,152],"constraints":[52],"because":[53],"excess,":[55],"power-hungry":[56,89],"resources":[57,90],"in":[58,161,175],"the":[59,83,96,116,133,140,184],"processor.":[61,118],"In":[62,154],"this":[63,138],"paper,":[64],"we":[65,107,157],"propose":[66],"ISA":[67,143],"extension":[68,144],"such":[70],"stringently":[71],"constrained":[72],"Contrary":[75],"previous":[77],"works,":[78],"our":[79,136,155],"work":[80,126],"rather":[81],"simplifies":[82],"processor":[85],"by":[86],"replacing":[87],"original":[88],"alternatives.":[93],"Then,":[94],"considering":[95],"application":[97],"features":[98],"(not":[99],"only":[100],"input":[101],"patterns":[102],"but":[103],"also":[104],"sequence),":[106],"extend":[108],"software":[109,122],"binary":[110],"new":[112],"instructions":[113],"executable":[114],"on":[115],"simplified":[117],"These":[119],"hardware":[120],"extensions":[123],"can":[124],"jointly":[125],"well":[127],"timing":[129],"speculation":[130],"(TS).":[131],"To":[132],"best":[134],"knowledge,":[137],"first":[141],"TS-aware":[142],"applicable":[145],"power-constraints.":[153],"evaluation,":[156],"achieved":[158],"29.9%":[159],"speedup":[160],"execution":[162],"time":[163],"1.5\u00d7":[165],"aggressive":[166],"clock":[167],"scaling":[168],"along":[169],"8.7%":[171],"48.3%":[173],"reduction":[174],"circuit":[176],"area":[177],"power-delay":[179],"product,":[180],"respectively,":[181],"compared":[182],"traditional":[185],"worst-case":[186],"design.":[187]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
