{"id":"https://openalex.org/W2144206556","doi":"https://doi.org/10.1109/asap.2010.5540997","title":"Combined scheduling and instruction selection for processors with reconfigurable cell fabric","display_name":"Combined scheduling and instruction selection for processors with reconfigurable cell fabric","publication_year":2010,"publication_date":"2010-07-01","ids":{"openalex":"https://openalex.org/W2144206556","doi":"https://doi.org/10.1109/asap.2010.5540997","mag":"2144206556"},"language":"en","primary_location":{"id":"doi:10.1109/asap.2010.5540997","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2010.5540997","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019259455","display_name":"Antoine Floch","orcid":null},"institutions":[{"id":"https://openalex.org/I56067802","display_name":"Universit\u00e9 de Rennes","ror":"https://ror.org/015m7wh34","country_code":"FR","type":"education","lineage":["https://openalex.org/I56067802"]},{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]}],"countries":["FR"],"is_corresponding":true,"raw_author_name":"Antoine Floch","raw_affiliation_strings":["Irisa, Inria, University of Rennes I, France","University of Rennes I, IRISA, INRIA, France#TAB#"],"affiliations":[{"raw_affiliation_string":"Irisa, Inria, University of Rennes I, France","institution_ids":["https://openalex.org/I2802519937","https://openalex.org/I56067802"]},{"raw_affiliation_string":"University of Rennes I, IRISA, INRIA, France#TAB#","institution_ids":["https://openalex.org/I56067802"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040469742","display_name":"Christophe Wolinski","orcid":null},"institutions":[{"id":"https://openalex.org/I2802519937","display_name":"Institut de Recherche en Informatique et Syst\u00e8mes Al\u00e9atoires","ror":"https://ror.org/00myn0z94","country_code":"FR","type":"facility","lineage":["https://openalex.org/I1294671590","https://openalex.org/I1294671590","https://openalex.org/I1326498283","https://openalex.org/I205703379","https://openalex.org/I2802204017","https://openalex.org/I2802519937","https://openalex.org/I28221208","https://openalex.org/I4210127572","https://openalex.org/I4210159245","https://openalex.org/I56067802"]},{"id":"https://openalex.org/I56067802","display_name":"Universit\u00e9 de Rennes","ror":"https://ror.org/015m7wh34","country_code":"FR","type":"education","lineage":["https://openalex.org/I56067802"]}],"countries":["FR"],"is_corresponding":false,"raw_author_name":"Christophe Wolinski","raw_affiliation_strings":["Irisa, Inria, University of Rennes I, France","University of Rennes I, IRISA, INRIA, France#TAB#"],"affiliations":[{"raw_affiliation_string":"Irisa, Inria, University of Rennes I, France","institution_ids":["https://openalex.org/I2802519937","https://openalex.org/I56067802"]},{"raw_affiliation_string":"University of Rennes I, IRISA, INRIA, France#TAB#","institution_ids":["https://openalex.org/I56067802"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060404940","display_name":"Krzysztof Kuchci\u0144ski","orcid":"https://orcid.org/0000-0001-8941-459X"},"institutions":[{"id":"https://openalex.org/I187531555","display_name":"Lund University","ror":"https://ror.org/012a77v79","country_code":"SE","type":"education","lineage":["https://openalex.org/I187531555"]}],"countries":["SE"],"is_corresponding":false,"raw_author_name":"Krzysztof Kuchcinski","raw_affiliation_strings":["Department of Computer Science, Lund University, Sweden","[Department of Computer Science, Lund University, Sweden]"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science, Lund University, Sweden","institution_ids":["https://openalex.org/I187531555"]},{"raw_affiliation_string":"[Department of Computer Science, Lund University, Sweden]","institution_ids":["https://openalex.org/I187531555"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5019259455"],"corresponding_institution_ids":["https://openalex.org/I2802519937","https://openalex.org/I56067802"],"apc_list":null,"apc_paid":null,"fwci":0.5054,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.68942424,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"167","last_page":"174"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.876657247543335},{"id":"https://openalex.org/keywords/very-long-instruction-word","display_name":"Very long instruction word","score":0.8135737776756287},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.666867196559906},{"id":"https://openalex.org/keywords/scheduling","display_name":"Scheduling (production processes)","score":0.5869127511978149},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.5765727162361145},{"id":"https://openalex.org/keywords/instruction-scheduling","display_name":"Instruction scheduling","score":0.4972279369831085},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.4909239411354065},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.4269675612449646},{"id":"https://openalex.org/keywords/instruction-set","display_name":"Instruction set","score":0.4205784499645233},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.4169308841228485},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.28675132989883423},{"id":"https://openalex.org/keywords/dynamic-priority-scheduling","display_name":"Dynamic priority scheduling","score":0.24077913165092468},{"id":"https://openalex.org/keywords/resource","display_name":"Resource (disambiguation)","score":0.11395376920700073},{"id":"https://openalex.org/keywords/two-level-scheduling","display_name":"Two-level scheduling","score":0.11191526055335999},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08144959807395935}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.876657247543335},{"id":"https://openalex.org/C170595534","wikidata":"https://www.wikidata.org/wiki/Q249743","display_name":"Very long instruction word","level":2,"score":0.8135737776756287},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.666867196559906},{"id":"https://openalex.org/C206729178","wikidata":"https://www.wikidata.org/wiki/Q2271896","display_name":"Scheduling (production processes)","level":2,"score":0.5869127511978149},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.5765727162361145},{"id":"https://openalex.org/C73564150","wikidata":"https://www.wikidata.org/wiki/Q11417093","display_name":"Instruction scheduling","level":5,"score":0.4972279369831085},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.4909239411354065},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.4269675612449646},{"id":"https://openalex.org/C202491316","wikidata":"https://www.wikidata.org/wiki/Q272683","display_name":"Instruction set","level":2,"score":0.4205784499645233},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.4169308841228485},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.28675132989883423},{"id":"https://openalex.org/C107568181","wikidata":"https://www.wikidata.org/wiki/Q5319000","display_name":"Dynamic priority scheduling","level":3,"score":0.24077913165092468},{"id":"https://openalex.org/C206345919","wikidata":"https://www.wikidata.org/wiki/Q20380951","display_name":"Resource (disambiguation)","level":2,"score":0.11395376920700073},{"id":"https://openalex.org/C119948110","wikidata":"https://www.wikidata.org/wiki/Q7858726","display_name":"Two-level scheduling","level":4,"score":0.11191526055335999},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08144959807395935},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C21547014","wikidata":"https://www.wikidata.org/wiki/Q1423657","display_name":"Operations management","level":1,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/asap.2010.5540997","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2010.5540997","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","raw_type":"proceedings-article"},{"id":"pmh:oai:HAL:inria-00480680v1","is_oa":false,"landing_page_url":"https://inria.hal.science/inria-00480680","pdf_url":null,"source":{"id":"https://openalex.org/S4306402512","display_name":"HAL (Le Centre pour la Communication Scientifique Directe)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I1294671590","host_organization_name":"Centre National de la Recherche Scientifique","host_organization_lineage":["https://openalex.org/I1294671590"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"21th IEEE International Conference on Application-specific Systems, Architectures and Processors, (ASAP 2010), IEEE, Jul 2010, Rennes, France","raw_type":"Conference papers"},{"id":"pmh:oai:lup.lub.lu.se:84a28b2e-5eeb-4a9e-9d69-f1cfee6bbb79","is_oa":false,"landing_page_url":"https://lup.lub.lu.se/record/1607152","pdf_url":null,"source":{"id":"https://openalex.org/S4306400536","display_name":"Lund University Publications (Lund University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I187531555","host_organization_name":"Lund University","host_organization_lineage":["https://openalex.org/I187531555"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"ISSN: 2160-0511","raw_type":"text"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":25,"referenced_works":["https://openalex.org/W115782310","https://openalex.org/W1687629676","https://openalex.org/W1706382616","https://openalex.org/W1978846379","https://openalex.org/W1980310053","https://openalex.org/W1982480183","https://openalex.org/W1994216113","https://openalex.org/W2053230311","https://openalex.org/W2089345113","https://openalex.org/W2111488604","https://openalex.org/W2121507132","https://openalex.org/W2126675596","https://openalex.org/W2127524685","https://openalex.org/W2130396671","https://openalex.org/W2131264876","https://openalex.org/W2134542516","https://openalex.org/W2141486354","https://openalex.org/W2154051217","https://openalex.org/W2160450201","https://openalex.org/W2165892109","https://openalex.org/W2169406908","https://openalex.org/W2170075581","https://openalex.org/W2171594157","https://openalex.org/W4244898092","https://openalex.org/W6604743135"],"related_works":["https://openalex.org/W2734211308","https://openalex.org/W1506210504","https://openalex.org/W2103250493","https://openalex.org/W2353958330","https://openalex.org/W2163046274","https://openalex.org/W2016285626","https://openalex.org/W2164925026","https://openalex.org/W2300994767","https://openalex.org/W1972260469","https://openalex.org/W2187073417"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,22,69],"new":[4,63],"method,":[5],"based":[6],"on":[7,68],"constraint":[8],"programming,":[9],"for":[10,18,87,104],"modeling":[11],"and":[12,15,40,62,98,106],"solving":[13],"scheduling":[14],"instruction":[16,79],"selection":[17,34],"processors":[19],"extended":[20],"with":[21],"functionally":[23],"reconfigurable":[24,31,70],"cell":[25,71],"fabric.":[26,72],"Our":[27,81],"method":[28,51,82],"models":[29],"parallel":[30,78],"architectures,":[32],"the":[33],"of":[35],"application":[36,41],"specific":[37],"computational":[38,66],"patterns":[39,67],"scheduling.":[42],"It":[43],"takes":[44],"also":[45],"into":[46],"account":[47],"architectural":[48],"constraints.":[49],"The":[50],"provides":[52],"efficient":[53],"design":[54],"space":[55],"exploration":[56],"that":[57],"selects":[58],"existing":[59],"processor":[60],"instructions":[61,64,74],"implementing":[65],"All":[73],"are":[75],"scheduled":[76],"enabling":[77],"execution.":[80],"can":[83],"be":[84],"used":[85,103],"directly":[86],"VLIW":[88],"architectures":[89],"by":[90],"relaxing":[91],"constraints":[92],"concerning":[93],"cell-processor":[94],"data":[95],"transfers.":[96],"MediaBench":[97],"MiBench":[99],"benchmarks":[100],"have":[101],"been":[102],"evaluation":[105],"we":[107],"obtained":[108],"optimal":[109],"results":[110],"in":[111],"many":[112],"cases.":[113]},"counts_by_year":[{"year":2022,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":2},{"year":2012,"cited_by_count":1}],"updated_date":"2026-04-05T17:49:38.594831","created_date":"2025-10-10T00:00:00"}