{"id":"https://openalex.org/W2104644014","doi":"https://doi.org/10.1109/asap.2010.5540775","title":"Comparing the robustness of fault-tolerant enhancements when applied to lookup tables and random logic for nano-computing","display_name":"Comparing the robustness of fault-tolerant enhancements when applied to lookup tables and random logic for nano-computing","publication_year":2010,"publication_date":"2010-07-01","ids":{"openalex":"https://openalex.org/W2104644014","doi":"https://doi.org/10.1109/asap.2010.5540775","mag":"2104644014"},"language":"en","primary_location":{"id":"doi:10.1109/asap.2010.5540775","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2010.5540775","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043035402","display_name":"Y. Dotan","orcid":null},"institutions":[{"id":"https://openalex.org/I2802112877","display_name":"Ruppin Academic Center","ror":"https://ror.org/0361c8163","country_code":"IL","type":"education","lineage":["https://openalex.org/I2802112877"]}],"countries":["IL"],"is_corresponding":true,"raw_author_name":"Yocheved Dotan","raw_affiliation_strings":["Dept. of Electrical and Computer Eng., Ruppin Academic Center, Ruppin, Israel"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Eng., Ruppin Academic Center, Ruppin, Israel","institution_ids":["https://openalex.org/I2802112877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5012433241","display_name":"Orgad Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I2802112877","display_name":"Ruppin Academic Center","ror":"https://ror.org/0361c8163","country_code":"IL","type":"education","lineage":["https://openalex.org/I2802112877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Orgad Chen","raw_affiliation_strings":["Dept. of Electrical and Computer Eng., Ruppin Academic Center, Ruppin, Israel"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Eng., Ruppin Academic Center, Ruppin, Israel","institution_ids":["https://openalex.org/I2802112877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5061246855","display_name":"Gil Katz","orcid":"https://orcid.org/0000-0001-7734-3851"},"institutions":[{"id":"https://openalex.org/I2802112877","display_name":"Ruppin Academic Center","ror":"https://ror.org/0361c8163","country_code":"IL","type":"education","lineage":["https://openalex.org/I2802112877"]}],"countries":["IL"],"is_corresponding":false,"raw_author_name":"Gil Katz","raw_affiliation_strings":["Dept. of Electrical and Computer Eng., Ruppin Academic Center, Ruppin, Israel"],"affiliations":[{"raw_affiliation_string":"Dept. of Electrical and Computer Eng., Ruppin Academic Center, Ruppin, Israel","institution_ids":["https://openalex.org/I2802112877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5043035402"],"corresponding_institution_ids":["https://openalex.org/I2802112877"],"apc_list":null,"apc_paid":null,"fwci":0.2886,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.64801762,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"285","issue":null,"first_page":"107","last_page":"114"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.7013464570045471},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.636601984500885},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.6309913992881775},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.616150975227356},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4816540777683258},{"id":"https://openalex.org/keywords/fault-coverage","display_name":"Fault coverage","score":0.4782620668411255},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.461195707321167},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.43007534742355347},{"id":"https://openalex.org/keywords/computer-engineering","display_name":"Computer engineering","score":0.371712863445282},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3279725909233093},{"id":"https://openalex.org/keywords/reliability-engineering","display_name":"Reliability engineering","score":0.32233911752700806},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.31663352251052856},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2987688183784485},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.21056047081947327},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.2041814923286438},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.14567527174949646},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.13037535548210144}],"concepts":[{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.7013464570045471},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.636601984500885},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.6309913992881775},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.616150975227356},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4816540777683258},{"id":"https://openalex.org/C126953365","wikidata":"https://www.wikidata.org/wiki/Q5438152","display_name":"Fault coverage","level":3,"score":0.4782620668411255},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.461195707321167},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.43007534742355347},{"id":"https://openalex.org/C113775141","wikidata":"https://www.wikidata.org/wiki/Q428691","display_name":"Computer engineering","level":1,"score":0.371712863445282},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3279725909233093},{"id":"https://openalex.org/C200601418","wikidata":"https://www.wikidata.org/wiki/Q2193887","display_name":"Reliability engineering","level":1,"score":0.32233911752700806},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.31663352251052856},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2987688183784485},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.21056047081947327},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.2041814923286438},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.14567527174949646},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.13037535548210144},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asap.2010.5540775","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2010.5540775","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"ASAP 2010 - 21st IEEE International Conference on Application-specific Systems, Architectures and Processors","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":58,"referenced_works":["https://openalex.org/W1524576247","https://openalex.org/W1547496565","https://openalex.org/W1548975601","https://openalex.org/W1566296806","https://openalex.org/W1585843380","https://openalex.org/W1887486069","https://openalex.org/W1891252100","https://openalex.org/W1936283550","https://openalex.org/W1967862658","https://openalex.org/W1988727117","https://openalex.org/W2007565138","https://openalex.org/W2010966375","https://openalex.org/W2015787113","https://openalex.org/W2016397658","https://openalex.org/W2016924415","https://openalex.org/W2025467801","https://openalex.org/W2035577388","https://openalex.org/W2049588548","https://openalex.org/W2049650033","https://openalex.org/W2058878560","https://openalex.org/W2063782027","https://openalex.org/W2069653216","https://openalex.org/W2073237284","https://openalex.org/W2073320693","https://openalex.org/W2090673131","https://openalex.org/W2091166549","https://openalex.org/W2097011161","https://openalex.org/W2102227718","https://openalex.org/W2106057522","https://openalex.org/W2114331604","https://openalex.org/W2115442171","https://openalex.org/W2116921278","https://openalex.org/W2117164389","https://openalex.org/W2119147938","https://openalex.org/W2122386818","https://openalex.org/W2136293553","https://openalex.org/W2137249916","https://openalex.org/W2138761088","https://openalex.org/W2140388451","https://openalex.org/W2140695465","https://openalex.org/W2142194434","https://openalex.org/W2151961246","https://openalex.org/W2160210493","https://openalex.org/W2162983760","https://openalex.org/W2165639089","https://openalex.org/W2169213530","https://openalex.org/W2170337384","https://openalex.org/W2171052198","https://openalex.org/W2483286657","https://openalex.org/W2497735908","https://openalex.org/W4250959541","https://openalex.org/W6632535395","https://openalex.org/W6633170706","https://openalex.org/W6634123939","https://openalex.org/W6640304604","https://openalex.org/W6652522674","https://openalex.org/W6677473765","https://openalex.org/W6680778281"],"related_works":["https://openalex.org/W2155289750","https://openalex.org/W2159724425","https://openalex.org/W4231267350","https://openalex.org/W2117956479","https://openalex.org/W2053477566","https://openalex.org/W4255564979","https://openalex.org/W4379115868","https://openalex.org/W2141712138","https://openalex.org/W2149339590","https://openalex.org/W2003435315"],"abstract_inverted_index":{"New":[0],"challenges":[1],"are":[2,35],"arising":[3],"in":[4,117],"the":[5,11,22,38,76,92,148,155,162],"design":[6,102,106,133,144,176],"of":[7,13,28,41,75,94,111],"computer":[8],"systems":[9],"with":[10,129,140],"emergence":[12],"new":[14,30],"nanometer-scale":[15],"devices":[16,34],"and":[17,25,32,58,73,103,122,124,177],"sophisticated":[18],"fabrication":[19],"techniques.":[20],"Unfortunately,":[21],"yield,":[23],"reliability,":[24],"drive":[26],"characteristics":[27,40],"these":[29],"deep-submicron":[31],"nano-scale":[33],"different":[36],"from":[37],"corresponding":[39],"conventional":[42],"CMOS":[43],"devices.":[44],"It":[45],"is":[46,63,147,181],"expected":[47],"that":[48],"future":[49],"circuit":[50,119],"technologies":[51],"will":[52,70],"have":[53],"substantially":[54],"higher":[55],"defect":[56],"densities":[57],"dynamic":[59],"fault":[60,84,112,115,137,166,182],"rates.":[61,113],"There":[62],"no":[64,178],"consensus":[65],"yet":[66],"on":[67],"which":[68,74],"technology":[69],"be":[71],"selected":[72],"traditional":[77],"logic":[78,105,175],"designs":[79],"has":[80],"an":[81],"advantage":[82],"for":[83,107,165],"tolerant":[85],"nano-computing.":[86],"In":[87],"this":[88],"work,":[89],"we":[90],"compare":[91],"robustness":[93],"several":[95],"fault-tolerant":[96],"approaches":[97],"applied":[98],"to":[99],"lookup":[100,131,156],"table":[101,132,157],"random":[104,142,174],"a":[108,118,130,141],"wide":[109],"range":[110],"Implementing":[114],"tolerance":[116],"using":[120,154,173],"TMR":[121,146,160],"Hamming":[123],"Hsiao":[125],"error":[126],"correcting":[127],"codes":[128],"style":[134],"gives":[135],"better":[136],"coverage":[138],"compared":[139],"gate":[143,179],"style.":[145],"best":[149],"fault-tolerance":[150],"technique":[151,164],"when":[152,171],"implemented":[153,172],"design.":[158],"However,":[159],"was":[161],"worst":[163],"rates":[167],"greater":[168],"than":[169],"0.5%":[170],"level":[180],"free.":[183]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}