{"id":"https://openalex.org/W2160442300","doi":"https://doi.org/10.1109/asap.2007.4429965","title":"The 1D Discrete Cosine Transform For Large Point Sizes Implemented On Reconfigurable Hardware","display_name":"The 1D Discrete Cosine Transform For Large Point Sizes Implemented On Reconfigurable Hardware","publication_year":2007,"publication_date":"2007-07-01","ids":{"openalex":"https://openalex.org/W2160442300","doi":"https://doi.org/10.1109/asap.2007.4429965","mag":"2160442300"},"language":"en","primary_location":{"id":"doi:10.1109/asap.2007.4429965","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2007.4429965","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039948566","display_name":"Sherman Braganza","orcid":null},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Sherman Braganza","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5083047329","display_name":"Miriam Leeser","orcid":"https://orcid.org/0000-0002-5624-056X"},"institutions":[{"id":"https://openalex.org/I12912129","display_name":"Northeastern University","ror":"https://ror.org/04t5xt781","country_code":"US","type":"education","lineage":["https://openalex.org/I12912129"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Miriam Leeser","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Northeastern University, Boston, MA, USA","institution_ids":["https://openalex.org/I12912129"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I12912129"],"apc_list":null,"apc_paid":null,"fwci":1.206,"has_fulltext":false,"cited_by_count":8,"citation_normalized_percentile":{"value":0.79330052,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"101","last_page":"106"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10688","display_name":"Image and Signal Denoising Methods","score":0.9926999807357788,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9911999702453613,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/discrete-cosine-transform","display_name":"Discrete cosine transform","score":0.8629031181335449},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6874390244483948},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.6817120313644409},{"id":"https://openalex.org/keywords/transform-coding","display_name":"Transform coding","score":0.6004233360290527},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5522897243499756},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.48588937520980835},{"id":"https://openalex.org/keywords/discrete-fourier-transform","display_name":"Discrete Fourier transform (general)","score":0.42665189504623413},{"id":"https://openalex.org/keywords/block","display_name":"Block (permutation group theory)","score":0.42115071415901184},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.39817994832992554},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3447723388671875},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.32196009159088135},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.26421353220939636},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.22290462255477905},{"id":"https://openalex.org/keywords/fractional-fourier-transform","display_name":"Fractional Fourier transform","score":0.189975768327713},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.186338871717453},{"id":"https://openalex.org/keywords/image","display_name":"Image (mathematics)","score":0.1586276888847351},{"id":"https://openalex.org/keywords/fourier-analysis","display_name":"Fourier analysis","score":0.0975695252418518}],"concepts":[{"id":"https://openalex.org/C2221639","wikidata":"https://www.wikidata.org/wiki/Q2877","display_name":"Discrete cosine transform","level":3,"score":0.8629031181335449},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6874390244483948},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.6817120313644409},{"id":"https://openalex.org/C169805256","wikidata":"https://www.wikidata.org/wiki/Q1361381","display_name":"Transform coding","level":4,"score":0.6004233360290527},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5522897243499756},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.48588937520980835},{"id":"https://openalex.org/C57733114","wikidata":"https://www.wikidata.org/wiki/Q1006032","display_name":"Discrete Fourier transform (general)","level":5,"score":0.42665189504623413},{"id":"https://openalex.org/C2777210771","wikidata":"https://www.wikidata.org/wiki/Q4927124","display_name":"Block (permutation group theory)","level":2,"score":0.42115071415901184},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.39817994832992554},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3447723388671875},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.32196009159088135},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.26421353220939636},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.22290462255477905},{"id":"https://openalex.org/C76563020","wikidata":"https://www.wikidata.org/wiki/Q4817582","display_name":"Fractional Fourier transform","level":4,"score":0.189975768327713},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.186338871717453},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.1586276888847351},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.0975695252418518},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/asap.2007.4429965","is_oa":false,"landing_page_url":"https://doi.org/10.1109/asap.2007.4429965","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.7400000095367432,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W585975565","https://openalex.org/W2037221767","https://openalex.org/W2099309245","https://openalex.org/W2111513816","https://openalex.org/W2126892434","https://openalex.org/W2139157895","https://openalex.org/W2142793848","https://openalex.org/W2150142775"],"related_works":["https://openalex.org/W2150576912","https://openalex.org/W2108727544","https://openalex.org/W2094583657","https://openalex.org/W2154006536","https://openalex.org/W2112053570","https://openalex.org/W2348800014","https://openalex.org/W1594300462","https://openalex.org/W2365391860","https://openalex.org/W2086323236","https://openalex.org/W2963134360"],"abstract_inverted_index":{"The":[0,122],"discrete":[1,11],"cosine":[2],"transform":[3,13],"(DCT)":[4],"is":[5,158],"used":[6,56],"in":[7,15,41,57],"place":[8],"of":[9,19,34,48,52,74,153],"the":[10,35,53,58,72,87,136,151],"Fourier":[12],"(DFT)":[14],"a":[16,105,117,187],"wide":[17],"variety":[18],"audio":[20],"and":[21,60,84,102],"image":[22,77],"processing":[23],"applications":[24,64],"due":[25,134],"to":[26,126,135,160,174,186],"its":[27],"energy":[28],"compaction":[29],"properties":[30],"which":[31,141],"approach":[32],"those":[33,70,85],"optimal":[36],"Karhunen-Love":[37],"transform.":[38],"Previous":[39],"work":[40],"reconfigurable":[42],"hardware":[43],"has":[44,171],"focused":[45],"on":[46,104,112],"implementations":[47],"2D":[49],"8times8":[50],"transforms":[51],"type":[54],"commonly":[55],"JPEG":[59],"MPEG":[61],"standards.":[62],"Several":[63],"for":[65,163],"larger":[66,137],"DCTs":[67,111],"exist,":[68],"including":[69],"involving":[71],"extraction":[73],"features":[75],"from":[76],"data,":[78],"solving":[79],"partial":[80],"differential":[81],"equations":[82],"(PDEs)":[83],"utilizing":[86],"preconditioned":[88],"conjugate":[89],"gradient":[90],"(PCG)":[91],"method":[92],"such":[93],"as":[94,184],"phase-unwrapping.":[95],"This":[96,156],"paper":[97],"presents":[98],"an":[99,164],"indirect":[100],"algorithm":[101],"implementation":[103],"Xilinx":[106],"FPGA":[107],"that":[108,161,191],"performs":[109],"1D":[110],"large":[113],"block":[114,118],"sizes":[115,139],"using":[116],"floating":[119],"point":[120,138],"format.":[121],"DCT":[123,170],"was":[124],"designed":[125],"use":[127],"fewer":[128],"resources":[129],"than":[130],"other":[131],"popular":[132],"approaches":[133],"supported":[140],"would":[142],"otherwise":[143],"consume":[144],"all":[145,199],"available":[146],"chip":[147],"area,":[148],"but":[149],"at":[150,181],"cost":[152],"higher":[154],"latency.":[155],"latency":[157],"similar":[159],"required":[162],"identically":[165],"sized":[166,189],"FFT":[167,190],"A":[168],"512-point":[169],"been":[172],"shown":[173],"take":[175],"1771":[176],"cycles":[177,194],"or":[178,195],"13.3":[179],"us":[180,197],"133":[182],"MHz":[183],"compared":[185],"similarly":[188],"takes":[192],"1757":[193],"13.2":[196],"(including":[198],"component":[200],"transfer":[201],"times).":[202]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2026-08-21T09:56:20.448147","created_date":"2025-10-10T00:00:00"}
