{"id":"https://openalex.org/W7130545008","doi":"https://doi.org/10.1109/apccas67402.2025.11378207","title":"A 66.7dB-SNDR Pipelined-SAR ADC with On-Chip Bit-Weight Calibration Achieving $\\triangle \\text{SNDR}&lt;2.4 \\text{dB}$ Across PVT Variations","display_name":"A 66.7dB-SNDR Pipelined-SAR ADC with On-Chip Bit-Weight Calibration Achieving $\\triangle \\text{SNDR}&lt;2.4 \\text{dB}$ Across PVT Variations","publication_year":2025,"publication_date":"2025-10-12","ids":{"openalex":"https://openalex.org/W7130545008","doi":"https://doi.org/10.1109/apccas67402.2025.11378207"},"language":null,"primary_location":{"id":"doi:10.1109/apccas67402.2025.11378207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas67402.2025.11378207","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5115591234","display_name":"Jinwei Zhang","orcid":"https://orcid.org/0009-0005-1520-2881"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jinwei Zhang","raw_affiliation_strings":["School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5047256160","display_name":"Haolin Han","orcid":"https://orcid.org/0000-0003-4566-1569"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Haolin Han","raw_affiliation_strings":["School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102634616","display_name":"Ruili Ren","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Ruili Ren","raw_affiliation_strings":["School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5122230534","display_name":"Shubin Liu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shubin Liu","raw_affiliation_strings":["School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5126416690","display_name":"Zhangming Zhu","orcid":null},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Integrated Circuits, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems,Xi&#x0027;an,China,710071","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9825999736785889,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9825999736785889,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.00419999985024333,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.0034000000450760126,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.7426999807357788},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.6822999715805054},{"id":"https://openalex.org/keywords/offset","display_name":"Offset (computer science)","score":0.570900022983551},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.5220000147819519},{"id":"https://openalex.org/keywords/input-offset-voltage","display_name":"Input offset voltage","score":0.5192999839782715},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.48080000281333923},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.47929999232292175},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.451200008392334},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4203000068664551}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.7426999807357788},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.6822999715805054},{"id":"https://openalex.org/C175291020","wikidata":"https://www.wikidata.org/wiki/Q1156822","display_name":"Offset (computer science)","level":2,"score":0.570900022983551},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.5220000147819519},{"id":"https://openalex.org/C63651839","wikidata":"https://www.wikidata.org/wiki/Q478566","display_name":"Input offset voltage","level":5,"score":0.5192999839782715},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5156999826431274},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.48080000281333923},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.47929999232292175},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.451200008392334},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4203000068664551},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.36169999837875366},{"id":"https://openalex.org/C44351266","wikidata":"https://www.wikidata.org/wiki/Q1465532","display_name":"Voltage reference","level":3,"score":0.35100001096725464},{"id":"https://openalex.org/C14245642","wikidata":"https://www.wikidata.org/wiki/Q399804","display_name":"Preamplifier","level":4,"score":0.3465000092983246},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.336899995803833},{"id":"https://openalex.org/C164862427","wikidata":"https://www.wikidata.org/wiki/Q2744647","display_name":"Flash ADC","level":4,"score":0.3321000039577484},{"id":"https://openalex.org/C16671190","wikidata":"https://www.wikidata.org/wiki/Q505579","display_name":"Effective number of bits","level":3,"score":0.3192000091075897},{"id":"https://openalex.org/C106131492","wikidata":"https://www.wikidata.org/wiki/Q3072260","display_name":"Filter (signal processing)","level":2,"score":0.3174000084400177},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.31459999084472656},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.31450000405311584},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.3084999918937683},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.3050999939441681},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.30469998717308044},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.30329999327659607},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.2980000078678131},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.28929999470710754},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.28519999980926514},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.25429999828338623}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas67402.2025.11378207","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas67402.2025.11378207","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.45946747064590454,"id":"https://metadata.un.org/sdg/7"}],"awards":[{"id":"https://openalex.org/G3080494368","display_name":null,"funder_award_id":"2022YFB4401900","funder_id":"https://openalex.org/F4320335777","funder_display_name":"National Key Research and Development Program of China"},{"id":"https://openalex.org/G8508838139","display_name":null,"funder_award_id":"62434007,U2441246,62227816,62021004","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"},{"id":"https://openalex.org/F4320335777","display_name":"National Key Research and Development Program of China","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2469737602","https://openalex.org/W2888054518","https://openalex.org/W2964783324","https://openalex.org/W4286571701","https://openalex.org/W4387071044","https://openalex.org/W4401881131"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,26,30,59,67,74,87],"two-stage":[4],"pipelined-SAR":[5],"ADC":[6,38,65],"with":[7,29,48],"offset":[8,15],"cancellation":[9],"technique,":[10],"which":[11],"cancels":[12],"the":[13,18,37,54,63],"equivalent":[14],"induced":[16],"by":[17,24],"comparator":[19],"and":[20,33,73,111],"residue":[21],"amplifier":[22],"(RA)":[23],"forming":[25],"feedback":[27],"path":[28,51],"notch":[31],"filter":[32],"level-shift":[34],"circuits.":[35],"Moreover,":[36],"is":[39,97],"calibrated":[40],"on":[41],"chip":[42],"through":[43],"onetime":[44],"bit-weight":[45],"calibration":[46],"together":[47],"an":[49],"independent":[50],"to":[52],"track":[53],"interstage":[55],"gain.":[56],"Fabricated":[57],"in":[58],"40nm":[60],"CMOS":[61],"process,":[62],"prototype":[64],"achieves":[66],"peak":[68],"SNDR":[69],"of":[70,76],"66.7":[71],"dB":[72,78,101],"SFDR":[75],"87.5":[77],"at":[79],"100":[80],"MS/s,":[81],"while":[82],"consuming":[83],"3.7":[84],"mW":[85],"from":[86],"1.1":[88],"V":[89],"supply.":[90],"The":[91],"measured":[92],"<tex":[93,103],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[94,104],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\triangle":[95],"\\text{SNDR}$</tex>":[96],"less":[98],"than":[99],"2.4":[100],"under":[102],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\pm":[105],"5":[106],"\\%$</tex>":[107],"supply":[108],"voltage":[109],"variation":[110],"\u221220\u00bcC-125\u00bcC":[112],"temperature":[113],"variation.":[114]},"counts_by_year":[],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2026-02-20T00:00:00"}