{"id":"https://openalex.org/W7130589229","doi":"https://doi.org/10.1109/apccas67402.2025.11377200","title":"A 99.1 dB-SNDR CT-DT NS SAR ADC with Two-Stage Stacking Inverter-Cascoded FIA","display_name":"A 99.1 dB-SNDR CT-DT NS SAR ADC with Two-Stage Stacking Inverter-Cascoded FIA","publication_year":2025,"publication_date":"2025-10-12","ids":{"openalex":"https://openalex.org/W7130589229","doi":"https://doi.org/10.1109/apccas67402.2025.11377200"},"language":null,"primary_location":{"id":"doi:10.1109/apccas67402.2025.11377200","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas67402.2025.11377200","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5084816122","display_name":"Yuan Du","orcid":"https://orcid.org/0000-0002-5316-619X"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yanzhujun Du","raw_affiliation_strings":["Institute of VLSI, Zhejiang University,Hangzhou,China,310063"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of VLSI, Zhejiang University,Hangzhou,China,310063","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5107280100","display_name":"Lingxin Meng","orcid":"https://orcid.org/0009-0003-5321-3616"},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lingxin Meng","raw_affiliation_strings":["Institute of VLSI, Zhejiang University,Hangzhou,China,310063"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of VLSI, Zhejiang University,Hangzhou,China,310063","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5126367469","display_name":"Menglian Zhao","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Menglian Zhao","raw_affiliation_strings":["Institute of VLSI, Zhejiang University,Hangzhou,China,310063"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of VLSI, Zhejiang University,Hangzhou,China,310063","institution_ids":["https://openalex.org/I76130692"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076012081","display_name":"Zhichao Tan","orcid":null},"institutions":[{"id":"https://openalex.org/I76130692","display_name":"Zhejiang University","ror":"https://ror.org/00a2xv884","country_code":"CN","type":"education","lineage":["https://openalex.org/I76130692"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhichao Tan","raw_affiliation_strings":["Institute of VLSI, Zhejiang University,Hangzhou,China,310063"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Institute of VLSI, Zhejiang University,Hangzhou,China,310063","institution_ids":["https://openalex.org/I76130692"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.55116773,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"5"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9857000112533569,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9857000112533569,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.006500000134110451,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.0017999999690800905,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/cascode","display_name":"Cascode","score":0.7493000030517578},{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.6782000064849854},{"id":"https://openalex.org/keywords/stacking","display_name":"Stacking","score":0.6413999795913696},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.46630001068115234},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.45649999380111694},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.4564000070095062},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4494999945163727},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.3312000036239624}],"concepts":[{"id":"https://openalex.org/C2775946640","wikidata":"https://www.wikidata.org/wiki/Q1735017","display_name":"Cascode","level":4,"score":0.7493000030517578},{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.6782000064849854},{"id":"https://openalex.org/C33347731","wikidata":"https://www.wikidata.org/wiki/Q285210","display_name":"Stacking","level":2,"score":0.6413999795913696},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5641999840736389},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.46630001068115234},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.45649999380111694},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.4564000070095062},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4494999945163727},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4049000144004822},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.38119998574256897},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.36550000309944153},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.3312000036239624},{"id":"https://openalex.org/C29265498","wikidata":"https://www.wikidata.org/wiki/Q7047719","display_name":"Noise measurement","level":3,"score":0.3224000036716461},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.3222000002861023},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.32089999318122864},{"id":"https://openalex.org/C163294075","wikidata":"https://www.wikidata.org/wiki/Q581861","display_name":"Noise reduction","level":2,"score":0.3183000087738037},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.3021000027656555},{"id":"https://openalex.org/C13944312","wikidata":"https://www.wikidata.org/wiki/Q7512748","display_name":"Signal-to-noise ratio (imaging)","level":2,"score":0.3000999987125397},{"id":"https://openalex.org/C142311740","wikidata":"https://www.wikidata.org/wiki/Q1066177","display_name":"Shaping","level":2,"score":0.2957000136375427},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.295199990272522},{"id":"https://openalex.org/C61829901","wikidata":"https://www.wikidata.org/wiki/Q769152","display_name":"High-gain antenna","level":2,"score":0.2854999899864197},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2849000096321106},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.2809999883174896},{"id":"https://openalex.org/C112806910","wikidata":"https://www.wikidata.org/wiki/Q746825","display_name":"Noise figure","level":4,"score":0.2797999978065491},{"id":"https://openalex.org/C110628552","wikidata":"https://www.wikidata.org/wiki/Q5283135","display_name":"Distributed amplifier","level":5,"score":0.2745000123977661},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.26159998774528503}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas67402.2025.11377200","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas67402.2025.11377200","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2025 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.6231659650802612}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W2783410960","https://openalex.org/W2921628406","https://openalex.org/W2995977659","https://openalex.org/W3086509224","https://openalex.org/W3134704865","https://openalex.org/W4285290407","https://openalex.org/W4385187231","https://openalex.org/W4396918248","https://openalex.org/W4400231168","https://openalex.org/W4404102610"],"related_works":[],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,48,68,73,94,113,129],"high-precision":[4],"two-step":[5],"continuous-time":[6],"(CT)":[7],"-":[8],"discrete-time":[9],"(DT)":[10],"noise-shaping":[11],"(NS)":[12],"successive":[13],"approximation":[14],"register":[15],"(SAR)":[16],"analog-to-digital":[17],"converter":[18],"(ADC).":[19],"A":[20],"two-stage":[21],"stacking":[22,35],"inverter-cascoded":[23],"FIA":[24],"is":[25,51],"proposed":[26],"to":[27,42,57],"precisely":[28],"perform":[29],"inter-stage":[30],"closed-loop":[31],"amplification,":[32],"utilizing":[33],"the":[34,39,44,54,60,81,85,88,101],"inverter":[36],"structure":[37,50],"in":[38,53,128],"first":[40],"stage":[41,56],"optimize":[43],"noise":[45,70,86],"efficiency,":[46],"while":[47,117],"cascode":[49],"introduced":[52],"second":[55],"further":[58],"enhance":[59],"DC":[61,74],"gain":[62,75],"and":[63,72,83],"stability.":[64],"The":[65],"amplifier":[66],"achieves":[67,106],"2-fold":[69],"reduction":[71],"of":[76,87,109,125,133],"89":[77],"dB,":[78],"thereby":[79],"enhancing":[80],"accuracy":[82],"reducing":[84],"ADC.":[89],"Simulation":[90],"results":[91],"based":[92],"on":[93],"65":[95],"nm":[96],"CMOS":[97],"process":[98],"show":[99],"that":[100],"CT-DT":[102],"NS":[103],"SAR":[104],"ADC":[105],"an":[107],"SNDR":[108],"99.1":[110],"dB":[111],"over":[112],"5":[114],"kHz":[115],"bandwidth":[116],"consuming":[118],"only":[119],"<tex":[120,134],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[121,135],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$33.1":[122],"\\mu":[123],"~\\mathrm{W}$</tex>":[124],"power,":[126],"resulting":[127],"Schreier":[130],"figure-of-merit":[131],"(FoMs)":[132],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\text{1":[136],"8":[137],"0.":[138],"9":[139],"~":[140],"d":[141],"B}$</tex>.":[142]},"counts_by_year":[],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2026-02-20T00:00:00"}