{"id":"https://openalex.org/W4405845778","doi":"https://doi.org/10.1109/apccas62602.2024.10808959","title":"Enhancing Finite State Machine Design Automation with Large Language Models and Prompt Engineering Techniques","display_name":"Enhancing Finite State Machine Design Automation with Large Language Models and Prompt Engineering Techniques","publication_year":2024,"publication_date":"2024-11-07","ids":{"openalex":"https://openalex.org/W4405845778","doi":"https://doi.org/10.1109/apccas62602.2024.10808959"},"language":"en","primary_location":{"id":"doi:10.1109/apccas62602.2024.10808959","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808959","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":null,"display_name":"Qun-Kai Lin","orcid":null},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Qun-Kai Lin","raw_affiliation_strings":["National Yang Ming Chiao Tung University,Department of Electronics and Electrical Engineering,Hsinchu,Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Yang Ming Chiao Tung University,Department of Electronics and Electrical Engineering,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5102198238","display_name":"Cheng Hsu","orcid":"https://orcid.org/0000-0003-3867-1240"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Cheng Hsu","raw_affiliation_strings":["National Yang Ming Chiao Tung University,Department of Electronics and Electrical Engineering,Hsinchu,Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Yang Ming Chiao Tung University,Department of Electronics and Electrical Engineering,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5067793643","display_name":"Tian\u2010Sheuan Chang","orcid":"https://orcid.org/0000-0002-0561-8745"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tian-Sheuan Chang","raw_affiliation_strings":["National Yang Ming Chiao Tung University,Department of Electronics and Electrical Engineering,Hsinchu,Taiwan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National Yang Ming Chiao Tung University,Department of Electronics and Electrical Engineering,Hsinchu,Taiwan","institution_ids":["https://openalex.org/I148366613"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I148366613"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"475","last_page":"478"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9914000034332275,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9912999868392944,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7061579823493958},{"id":"https://openalex.org/keywords/automation","display_name":"Automation","score":0.6586073040962219},{"id":"https://openalex.org/keywords/finite-state-machine","display_name":"Finite-state machine","score":0.6581701040267944},{"id":"https://openalex.org/keywords/abstract-state-machines","display_name":"Abstract state machines","score":0.5196441411972046},{"id":"https://openalex.org/keywords/state","display_name":"State (computer science)","score":0.500795841217041},{"id":"https://openalex.org/keywords/finite-state","display_name":"Finite state","score":0.49193692207336426},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.47800007462501526},{"id":"https://openalex.org/keywords/extended-finite-state-machine","display_name":"Extended finite-state machine","score":0.42360007762908936},{"id":"https://openalex.org/keywords/computer-automated-design","display_name":"Computer-automated design","score":0.41656601428985596},{"id":"https://openalex.org/keywords/software-engineering","display_name":"Software engineering","score":0.3684294521808624},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.36274033784866333},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.20762312412261963},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1708957552909851},{"id":"https://openalex.org/keywords/systems-design","display_name":"Systems design","score":0.11620268225669861},{"id":"https://openalex.org/keywords/mechanical-engineering","display_name":"Mechanical engineering","score":0.10934451222419739},{"id":"https://openalex.org/keywords/machine-learning","display_name":"Machine learning","score":0.08746826648712158}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7061579823493958},{"id":"https://openalex.org/C115901376","wikidata":"https://www.wikidata.org/wiki/Q184199","display_name":"Automation","level":2,"score":0.6586073040962219},{"id":"https://openalex.org/C167822520","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite-state machine","level":2,"score":0.6581701040267944},{"id":"https://openalex.org/C145243422","wikidata":"https://www.wikidata.org/wiki/Q333385","display_name":"Abstract state machines","level":3,"score":0.5196441411972046},{"id":"https://openalex.org/C48103436","wikidata":"https://www.wikidata.org/wiki/Q599031","display_name":"State (computer science)","level":2,"score":0.500795841217041},{"id":"https://openalex.org/C2983497884","wikidata":"https://www.wikidata.org/wiki/Q176452","display_name":"Finite state","level":3,"score":0.49193692207336426},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.47800007462501526},{"id":"https://openalex.org/C181062253","wikidata":"https://www.wikidata.org/wiki/Q5421886","display_name":"Extended finite-state machine","level":3,"score":0.42360007762908936},{"id":"https://openalex.org/C205976826","wikidata":"https://www.wikidata.org/wiki/Q5157390","display_name":"Computer-automated design","level":3,"score":0.41656601428985596},{"id":"https://openalex.org/C115903868","wikidata":"https://www.wikidata.org/wiki/Q80993","display_name":"Software engineering","level":1,"score":0.3684294521808624},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.36274033784866333},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.20762312412261963},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1708957552909851},{"id":"https://openalex.org/C31352089","wikidata":"https://www.wikidata.org/wiki/Q3750474","display_name":"Systems design","level":2,"score":0.11620268225669861},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.10934451222419739},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.08746826648712158},{"id":"https://openalex.org/C98763669","wikidata":"https://www.wikidata.org/wiki/Q176645","display_name":"Markov chain","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas62602.2024.10808959","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808959","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":4,"referenced_works":["https://openalex.org/W4388040405","https://openalex.org/W4389166737","https://openalex.org/W4393145520","https://openalex.org/W6857951434"],"related_works":["https://openalex.org/W2371707945","https://openalex.org/W4251237796","https://openalex.org/W2105609842","https://openalex.org/W2098353690","https://openalex.org/W4281261571","https://openalex.org/W4387024110","https://openalex.org/W2038083073","https://openalex.org/W4234323147","https://openalex.org/W2368776736","https://openalex.org/W1482682731"],"abstract_inverted_index":{"Large":[0],"Language":[1,19],"Models":[2],"(LLMs)":[3],"have":[4,111],"attracted":[5],"considerable":[6],"attention":[7],"in":[8,39,91,133],"recent":[9],"years":[10],"due":[11],"to":[12,114,117],"their":[13],"remarkable":[14],"compatibility":[15],"with":[16,128],"Hardware":[17],"Description":[18],"(HDL)":[20],"design.":[21],"In":[22],"this":[23],"paper,":[24],"we":[25,53,70],"examine":[26],"the":[27,47,55,63,72,76,84,100,106,112,134],"performance":[28],"of":[29,66,74,87],"three":[30],"major":[31],"LLMs,":[32],"Claude":[33],"3":[34],"Opus,":[35],"ChatGPT-4,":[36],"and":[37,58,105],"ChatGPT-4o,":[38],"designing":[40],"finite":[41],"state":[42],"machines":[43],"(FSMs).":[44],"By":[45],"utilizing":[46],"instructional":[48],"content":[49],"provided":[50],"by":[51],"HDLBits,":[52],"evaluate":[54],"stability,":[56],"limitations,":[57],"potential":[59,113],"approaches":[60],"for":[61],"improving":[62],"success":[64,85],"rates":[65],"these":[67,88],"models.":[68],"Furthermore,":[69],"explore":[71],"impact":[73],"using":[75],"prompt-refining":[77],"method,":[78],"To-do-Oriented":[79],"Prompting":[80],"(TOP)":[81],"Patch,":[82],"on":[83],"rate":[86],"LLM":[89],"models":[90],"various":[92],"FSM":[93],"design":[94,122],"scenarios.":[95],"The":[96],"results":[97],"show":[98],"that":[99],"systematic":[101],"format":[102],"prompt":[103,108,130],"method":[104,110],"novel":[107],"refinement":[109],"be":[115],"applied":[116],"other":[118,129],"domains":[119],"beyond":[120],"HDL":[121],"automation,":[123],"considering":[124],"its":[125],"possible":[126],"integration":[127],"engineering":[131],"techniques":[132],"future.":[135]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}