{"id":"https://openalex.org/W4405845330","doi":"https://doi.org/10.1109/apccas62602.2024.10808929","title":"Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme","display_name":"Design of Novel Systolic Array based NTT for CRYSTALS-Kyber scheme","publication_year":2024,"publication_date":"2024-11-07","ids":{"openalex":"https://openalex.org/W4405845330","doi":"https://doi.org/10.1109/apccas62602.2024.10808929"},"language":"en","primary_location":{"id":"doi:10.1109/apccas62602.2024.10808929","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808929","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5041243644","display_name":"Keerthija Puli","orcid":null},"institutions":[{"id":"https://openalex.org/I4210109292","display_name":"Indian Institute of Technology Tirupati","ror":"https://ror.org/01xtkxh20","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210109292"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Keerthija Puli","raw_affiliation_strings":["Indian Institute of Technology Tirupati,Tirupati,Andhra Pradesh,India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Tirupati,Tirupati,Andhra Pradesh,India","institution_ids":["https://openalex.org/I4210109292"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5025451495","display_name":"Vikramkumar Pudi","orcid":"https://orcid.org/0000-0003-3992-0624"},"institutions":[{"id":"https://openalex.org/I4210109292","display_name":"Indian Institute of Technology Tirupati","ror":"https://ror.org/01xtkxh20","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210109292"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Vikramkumar Pudi","raw_affiliation_strings":["Indian Institute of Technology Tirupati,Tirupati,Andhra Pradesh,India"],"affiliations":[{"raw_affiliation_string":"Indian Institute of Technology Tirupati,Tirupati,Andhra Pradesh,India","institution_ids":["https://openalex.org/I4210109292"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5041243644"],"corresponding_institution_ids":["https://openalex.org/I4210109292"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.26426656,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"539","last_page":"543"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.7728999853134155,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.7728999853134155,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10148","display_name":"Advanced MIMO Systems Optimization","score":0.7415000200271606,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.7188000082969666,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5987287759780884},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5536978244781494},{"id":"https://openalex.org/keywords/systolic-array","display_name":"Systolic array","score":0.5225051045417786},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3768896162509918},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.34961339831352234},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.20091620087623596},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15701258182525635},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.09234699606895447}],"concepts":[{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5987287759780884},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5536978244781494},{"id":"https://openalex.org/C150741067","wikidata":"https://www.wikidata.org/wiki/Q2377218","display_name":"Systolic array","level":3,"score":0.5225051045417786},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3768896162509918},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.34961339831352234},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.20091620087623596},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15701258182525635},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.09234699606895447},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas62602.2024.10808929","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808929","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":17,"referenced_works":["https://openalex.org/W1513904472","https://openalex.org/W1973439009","https://openalex.org/W2168676717","https://openalex.org/W2866028610","https://openalex.org/W2945132152","https://openalex.org/W3049114471","https://openalex.org/W3120407570","https://openalex.org/W3135053459","https://openalex.org/W3157961299","https://openalex.org/W3216309469","https://openalex.org/W3216360301","https://openalex.org/W4298363122","https://openalex.org/W4366307911","https://openalex.org/W4384284110","https://openalex.org/W4384947555","https://openalex.org/W6781521212","https://openalex.org/W7028930996"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W4240320454","https://openalex.org/W2070314832","https://openalex.org/W2395557210","https://openalex.org/W2010232134","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2352941988"],"abstract_inverted_index":{"Cryptographic":[0],"Suite":[1],"for":[2,10,37,92],"Algebraic":[3],"Lattices":[4],"(CRYSTALS)":[5],"-":[6],"Kyber":[7],"is":[8,40,108,144],"known":[9],"its":[11],"efficiency":[12],"and":[13,79,142],"security":[14],"in":[15,26,47,102,132],"resisting":[16],"the":[17,22,27,43,67,76,80,84,89,93,119,127,133],"quantum":[18,29],"computer":[19],"attacks,":[20],"beating":[21],"conventional":[23,68],"encryption":[24],"methods":[25],"post":[28],"computing":[30],"era.":[31],"Number":[32],"Theoretic":[33],"Transform":[34],"(NTT),":[35],"used":[36],"polynomial":[38],"multiplication,":[39],"one":[41],"of":[42,58,83,98,104],"computationally":[44],"expensive":[45],"units":[46],"Kyber.":[48],"In":[49,124],"this":[50,111],"article,":[51],"we":[52,87],"present":[53],"a":[54,130],"novel":[55],"systolic":[56],"architecture":[57],"NTT":[59],"with":[60,113],"minimized":[61],"Processing":[62],"Elements":[63],"(PE)":[64],"to":[65,118,126],"replace":[66],"Butterfly":[69],"Unit":[70],"(BU)":[71],"architecture.":[72],"This":[73],"approach":[74,112],"reduces":[75],"design":[77],"complexity":[78],"computational":[81],"delay":[82],"unit,":[85],"as":[86,116],"minimize":[88],"hardware":[90],"required":[91],"implementation.":[94],"A":[95],"significant":[96],"improvement":[97],"more":[99],"than":[100],"40%":[101],"terms":[103],"area":[105,134],"time":[106],"product":[107],"achieved":[109],"employing":[110],"minimum":[114],"hardware,":[115],"compared":[117],"traditional":[120],"lightweight":[121],"sequential":[122],"NTT.":[123],"comparison":[125],"existing":[128],"architectures,":[129],"reduction":[131],"by":[135],"utilizing":[136],"37-60%":[137],"fewer":[138],"resources":[139],"like":[140],"FFs,":[141],"LUTs":[143],"observed.":[145]},"counts_by_year":[],"updated_date":"2025-12-23T23:11:35.936235","created_date":"2025-10-10T00:00:00"}