{"id":"https://openalex.org/W4405845240","doi":"https://doi.org/10.1109/apccas62602.2024.10808823","title":"Interactive Analog IC Layout Tool with Real-time Parasitic-aware Automatic Routing Assistance","display_name":"Interactive Analog IC Layout Tool with Real-time Parasitic-aware Automatic Routing Assistance","publication_year":2024,"publication_date":"2024-11-07","ids":{"openalex":"https://openalex.org/W4405845240","doi":"https://doi.org/10.1109/apccas62602.2024.10808823"},"language":"en","primary_location":{"id":"doi:10.1109/apccas62602.2024.10808823","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808823","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100402008","display_name":"Yu Chen","orcid":"https://orcid.org/0000-0002-1519-4894"},"institutions":[{"id":"https://openalex.org/I173093425","display_name":"Chang Gung University","ror":"https://ror.org/00d80zx46","country_code":"TW","type":"education","lineage":["https://openalex.org/I173093425"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Yu-Tzu Chen","raw_affiliation_strings":["Chang Gung University,Dept. of Computer Science &#x0026; Information Engineering,Taiwan"],"affiliations":[{"raw_affiliation_string":"Chang Gung University,Dept. of Computer Science &#x0026; Information Engineering,Taiwan","institution_ids":["https://openalex.org/I173093425"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5040490523","display_name":"Chin-Fu Nien","orcid":"https://orcid.org/0000-0002-1892-6691"},"institutions":[{"id":"https://openalex.org/I148366613","display_name":"National Yang Ming Chiao Tung University","ror":"https://ror.org/00se2k293","country_code":"TW","type":"education","lineage":["https://openalex.org/I148366613"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chin-Fu Nien","raw_affiliation_strings":["National Yang Ming Chiao Tung University,Dept. of Electronics and Electrical Engineering,Taiwan"],"affiliations":[{"raw_affiliation_string":"National Yang Ming Chiao Tung University,Dept. of Electronics and Electrical Engineering,Taiwan","institution_ids":["https://openalex.org/I148366613"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078761347","display_name":"Chin Hsia","orcid":null},"institutions":[{"id":"https://openalex.org/I173093425","display_name":"Chang Gung University","ror":"https://ror.org/00d80zx46","country_code":"TW","type":"education","lineage":["https://openalex.org/I173093425"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chin Hsia","raw_affiliation_strings":["Chang Gung University,Dept. of Mechanical Engineering,Taiwan"],"affiliations":[{"raw_affiliation_string":"Chang Gung University,Dept. of Mechanical Engineering,Taiwan","institution_ids":["https://openalex.org/I173093425"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060831778","display_name":"Chung\u2010Yi Li","orcid":"https://orcid.org/0000-0002-0321-8908"},"institutions":[{"id":"https://openalex.org/I173093425","display_name":"Chang Gung University","ror":"https://ror.org/00d80zx46","country_code":"TW","type":"education","lineage":["https://openalex.org/I173093425"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chung-Yi Li","raw_affiliation_strings":["Chang Gung University,Dept. of Electronics Engineering,Taiwan"],"affiliations":[{"raw_affiliation_string":"Chang Gung University,Dept. of Electronics Engineering,Taiwan","institution_ids":["https://openalex.org/I173093425"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100402008"],"corresponding_institution_ids":["https://openalex.org/I173093425"],"apc_list":null,"apc_paid":null,"fwci":0.5198,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.68568875,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"149","last_page":"153"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9959999918937683,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7357403039932251},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.6831682920455933},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.36474043130874634},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3318201005458832}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7357403039932251},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.6831682920455933},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.36474043130874634},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3318201005458832}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas62602.2024.10808823","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808823","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[{"id":"https://openalex.org/F4320331164","display_name":"National Science and Technology Council","ror":"https://ror.org/00wnb9798"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":20,"referenced_works":["https://openalex.org/W1605203071","https://openalex.org/W1824719425","https://openalex.org/W1981463101","https://openalex.org/W2085073472","https://openalex.org/W2105616993","https://openalex.org/W2106657926","https://openalex.org/W2121482944","https://openalex.org/W2124352222","https://openalex.org/W2156895672","https://openalex.org/W2162840580","https://openalex.org/W2168621788","https://openalex.org/W2801245496","https://openalex.org/W2998328510","https://openalex.org/W3174668475","https://openalex.org/W4232735308","https://openalex.org/W4256145522","https://openalex.org/W4285122723","https://openalex.org/W4310502229","https://openalex.org/W4362714748","https://openalex.org/W6619766454"],"related_works":["https://openalex.org/W4391375266","https://openalex.org/W2899084033","https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W4391913857","https://openalex.org/W2358668433","https://openalex.org/W4396701345","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W4396696052"],"abstract_inverted_index":{"Analog":[0],"routing":[1,37,102,112,167],"automation":[2,46],"is":[3,38],"challenging":[4],"compared":[5],"to":[6,10,79,82,146],"digital":[7,54],"circuits":[8],"due":[9],"factors":[11],"such":[12],"as":[13],"signal":[14],"cross-talk":[15],"and":[16,33,70,117,124,153,172],"asymmetrical":[17],"ion":[18],"currents":[19],"caused":[20],"by":[21,41,115],"electromigration,":[22],"which":[23],"are":[24,49],"highly":[25],"correlated":[26],"with":[27,65,86,132,175],"physical":[28],"attributes":[29],"like":[30],"wire":[31,125],"length":[32,126],"width.":[34],"Therefore,":[35],"analog":[36,62,95],"typically":[39],"performed":[40],"layout":[42,63,72,96,151],"engineers":[43,64,145],"instead":[44],"of":[45,77,94,135,150],"tools":[47],"that":[48,160],"commonly":[50],"used":[51],"in":[52],"the":[53,91,136,140,161],"circuit":[55,84],"design":[56,152],"process.":[57],"Equipping":[58],"students":[59],"or":[60],"novice":[61],"a":[66],"robust":[67],"theoretical":[68],"foundation":[69],"extensive":[71],"experience":[73],"may":[74],"require":[75],"years":[76],"training":[78,92],"enable":[80],"them":[81],"derive":[83],"layouts":[85],"superior":[87],"performance.":[88],"To":[89],"accelerate":[90],"process":[93],"engineers,":[97],"we":[98],"develop":[99],"an":[100,133],"interactive":[101],"assistance":[103],"tool.":[104],"The":[105,157],"proposed":[106,162],"tool":[107,163],"provides":[108],"real-time":[109],"parasitic-aware":[110],"automatic":[111,166],"suggestions":[113],"guided":[114],"heuristic":[116],"cost":[118],"functions":[119],"based":[120],"on":[121],"fringe":[122],"capacitance":[123],"minimization":[127],"for":[128,139],"route":[129],"prediction,":[130],"along":[131],"estimation":[134],"Elmore":[137],"Delay":[138],"resulting":[141],"path.":[142],"This":[143],"allows":[144],"quickly":[147],"acquire":[148],"knowledge":[149],"make":[154],"informed":[155],"decisions.":[156],"evaluation":[158],"demonstrates":[159],"can":[164],"offer":[165],"assistance,":[168],"reducing":[169],"potential":[170],"delay":[171],"avoiding":[173],"congestion":[174],"minimal":[176],"overhead.":[177]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2025-12-23T23:11:35.936235","created_date":"2025-10-10T00:00:00"}
