{"id":"https://openalex.org/W4405845907","doi":"https://doi.org/10.1109/apccas62602.2024.10808398","title":"Multiple-Loop Analysis and Design for Fast-Transient Capacitor-less LDO with Dual-Path Compensation and Zero-Pole placement in 65-nm CMOS","display_name":"Multiple-Loop Analysis and Design for Fast-Transient Capacitor-less LDO with Dual-Path Compensation and Zero-Pole placement in 65-nm CMOS","publication_year":2024,"publication_date":"2024-11-07","ids":{"openalex":"https://openalex.org/W4405845907","doi":"https://doi.org/10.1109/apccas62602.2024.10808398"},"language":"en","primary_location":{"id":"doi:10.1109/apccas62602.2024.10808398","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808398","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109725699","display_name":"Peijuan Ju","orcid":null},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Peijuan Ju","raw_affiliation_strings":["Southeast University,National Mobile Communication Research Laboratory,Nanjing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,National Mobile Communication Research Laboratory,Nanjing,China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076758349","display_name":"Qisong Wu","orcid":"https://orcid.org/0000-0002-2114-7672"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Qisong Wu","raw_affiliation_strings":["Southeast University,National Mobile Communication Research Laboratory,Nanjing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,National Mobile Communication Research Laboratory,Nanjing,China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5070228879","display_name":"Dixian Zhao","orcid":"https://orcid.org/0000-0003-2263-105X"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Dixian Zhao","raw_affiliation_strings":["Southeast University,National Mobile Communication Research Laboratory,Nanjing,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Southeast University,National Mobile Communication Research Laboratory,Nanjing,China","institution_ids":["https://openalex.org/I76569877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.1628,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.49083296,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"382","last_page":"386"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6695169806480408},{"id":"https://openalex.org/keywords/compensation","display_name":"Compensation (psychology)","score":0.6282804608345032},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5894609093666077},{"id":"https://openalex.org/keywords/transient","display_name":"Transient (computer programming)","score":0.5691332221031189},{"id":"https://openalex.org/keywords/transient-response","display_name":"Transient response","score":0.5414907932281494},{"id":"https://openalex.org/keywords/loop","display_name":"Loop (graph theory)","score":0.5055294036865234},{"id":"https://openalex.org/keywords/control-theory","display_name":"Control theory (sociology)","score":0.5023958683013916},{"id":"https://openalex.org/keywords/dual-loop","display_name":"Dual loop","score":0.48471856117248535},{"id":"https://openalex.org/keywords/transient-analysis","display_name":"Transient analysis","score":0.4814945459365845},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.451107382774353},{"id":"https://openalex.org/keywords/path","display_name":"Path (computing)","score":0.42952263355255127},{"id":"https://openalex.org/keywords/frequency-compensation","display_name":"Frequency compensation","score":0.42845314741134644},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3717714548110962},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3173564672470093},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.2465735673904419},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22911182045936584},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19178920984268188},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.1243947446346283}],"concepts":[{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6695169806480408},{"id":"https://openalex.org/C2780023022","wikidata":"https://www.wikidata.org/wiki/Q1338171","display_name":"Compensation (psychology)","level":2,"score":0.6282804608345032},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5894609093666077},{"id":"https://openalex.org/C2780799671","wikidata":"https://www.wikidata.org/wiki/Q17087362","display_name":"Transient (computer programming)","level":2,"score":0.5691332221031189},{"id":"https://openalex.org/C85761212","wikidata":"https://www.wikidata.org/wiki/Q1974593","display_name":"Transient response","level":2,"score":0.5414907932281494},{"id":"https://openalex.org/C184670325","wikidata":"https://www.wikidata.org/wiki/Q512604","display_name":"Loop (graph theory)","level":2,"score":0.5055294036865234},{"id":"https://openalex.org/C47446073","wikidata":"https://www.wikidata.org/wiki/Q5165890","display_name":"Control theory (sociology)","level":3,"score":0.5023958683013916},{"id":"https://openalex.org/C2779691726","wikidata":"https://www.wikidata.org/wiki/Q5310214","display_name":"Dual loop","level":3,"score":0.48471856117248535},{"id":"https://openalex.org/C2989121073","wikidata":"https://www.wikidata.org/wiki/Q1309019","display_name":"Transient analysis","level":3,"score":0.4814945459365845},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.451107382774353},{"id":"https://openalex.org/C2777735758","wikidata":"https://www.wikidata.org/wiki/Q817765","display_name":"Path (computing)","level":2,"score":0.42952263355255127},{"id":"https://openalex.org/C131782439","wikidata":"https://www.wikidata.org/wiki/Q1455581","display_name":"Frequency compensation","level":4,"score":0.42845314741134644},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3717714548110962},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3173564672470093},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.2465735673904419},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22911182045936584},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19178920984268188},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.1243947446346283},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C2775924081","wikidata":"https://www.wikidata.org/wiki/Q55608371","display_name":"Control (management)","level":2,"score":0.0},{"id":"https://openalex.org/C15744967","wikidata":"https://www.wikidata.org/wiki/Q9418","display_name":"Psychology","level":0,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C11171543","wikidata":"https://www.wikidata.org/wiki/Q41630","display_name":"Psychoanalysis","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas62602.2024.10808398","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas62602.2024.10808398","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1972150182","https://openalex.org/W1979630295","https://openalex.org/W1990998577","https://openalex.org/W2081968211","https://openalex.org/W2167017502","https://openalex.org/W2982309304","https://openalex.org/W3088098941","https://openalex.org/W4225764002","https://openalex.org/W4379382634"],"related_works":["https://openalex.org/W2050909734","https://openalex.org/W1965937483","https://openalex.org/W2316958959","https://openalex.org/W2009135099","https://openalex.org/W2972909052","https://openalex.org/W2363306220","https://openalex.org/W3174436460","https://openalex.org/W2056500914","https://openalex.org/W2063436742","https://openalex.org/W2315956789"],"abstract_inverted_index":{"The":[0,81],"main":[1,16],"loop":[2,17],"transfer":[3,76],"function":[4,77],"of":[5,14,110],"a":[6,30,36,50,88,116,136,146,152],"low":[7],"dropout":[8],"regulator":[9],"(LDO)":[10],"reveals":[11],"the":[12,15,22,64,75,99,102,128,142],"stability":[13],"but":[18],"lacks":[19],"explanations":[20],"for":[21,106],"high-frequency":[23],"output":[24],"voltage":[25],"ringing.":[26],"This":[27],"work":[28],"proposes":[29],"multiple-loop":[31,56],"small":[32],"signal":[33],"analysis":[34],"on":[35],"capacitor-less":[37],"LDO":[38],"with":[39,54,92,151],"Ahuja":[40],"compensation":[41],"in":[42,78,87,135],"two":[43],"paths,":[44],"providing":[45],"design":[46,83],"guidelines":[47],"to":[48,62,98,112],"achieve":[49],"fast":[51],"transient":[52,65,108],"response":[53,66],"good":[55],"stability.":[57],"Zero-pole":[58],"placement":[59],"is":[60,85,120,131],"incorporated":[61],"enhance":[63],"and":[67,104,123,139],"fullspectrum":[68],"power":[69],"supply":[70],"rejection":[71],"(PSR),":[72],"explained":[73],"through":[74],"multiple":[79],"loops.":[80],"proposed":[82],"technique":[84],"verified":[86],"$65-\\mathrm{nm}$":[89],"CMOS":[90],"process":[91],"$0.037":[93],"\\mathrm{~mm}^{2}$":[94],"active":[95],"area.":[96],"According":[97],"measurement":[100],"results,":[101],"undershoot":[103],"overshoot":[105],"load":[107,150],"current":[109,149],"0":[111],"15":[113,147],"mA":[114,148],"within":[115],"200ps":[117],"edge":[118],"time":[119],"only":[121],"44":[122],"46":[124],"mV":[125],"respectively.":[126],"Furthermore,":[127],"measured":[129],"PSR":[130],"better":[132],"than":[133],"-46dB":[134],"lowfrequency":[137],"band":[138],"-8dB":[140],"over":[141],"whole":[143],"spectrum":[144],"under":[145],"200":[153],"pF":[154],"on-chip":[155],"capacitor.":[156]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}
