{"id":"https://openalex.org/W4365131127","doi":"https://doi.org/10.1109/apccas55924.2022.10090389","title":"Ternary In-Memory MAC Accelerator With Dual-6T SRAM Cell for Deep Neural Networks","display_name":"Ternary In-Memory MAC Accelerator With Dual-6T SRAM Cell for Deep Neural Networks","publication_year":2022,"publication_date":"2022-11-11","ids":{"openalex":"https://openalex.org/W4365131127","doi":"https://doi.org/10.1109/apccas55924.2022.10090389"},"language":"en","primary_location":{"id":"doi:10.1109/apccas55924.2022.10090389","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas55924.2022.10090389","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100348153","display_name":"Xudong Wang","orcid":"https://orcid.org/0000-0002-9762-6792"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xudong Wang","raw_affiliation_strings":["School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5029696367","display_name":"Li Geng","orcid":"https://orcid.org/0000-0003-1974-6980"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Geng Li","raw_affiliation_strings":["School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5078217181","display_name":"Jiacong Sun","orcid":"https://orcid.org/0000-0003-0418-2713"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Jiacong Sun","raw_affiliation_strings":["School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018997946","display_name":"Huanjie Fan","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huanjie Fan","raw_affiliation_strings":["School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100454403","display_name":"Yong Chen","orcid":"https://orcid.org/0000-0002-4846-7131"},"institutions":[{"id":"https://openalex.org/I204512498","display_name":"University of Macau","ror":"https://ror.org/01r4q9n85","country_code":"MO","type":"education","lineage":["https://openalex.org/I204512498"]}],"countries":["MO"],"is_corresponding":false,"raw_author_name":"Yong Chen","raw_affiliation_strings":["University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,Macau,China","State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"University of Macau,State Key Laboratory of Analog and Mixed-Signal VLSI,Macau,China","institution_ids":["https://openalex.org/I204512498"]},{"raw_affiliation_string":"State Key Laboratory of Analog and Mixed-Signal VLSI, University of Macau, Macau, China","institution_ids":["https://openalex.org/I204512498"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042636120","display_name":"Hailong Jiao","orcid":"https://orcid.org/0000-0002-2815-6168"},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Hailong Jiao","raw_affiliation_strings":["School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University,Shenzhen,China","institution_ids":["https://openalex.org/I20231570"]},{"raw_affiliation_string":"School of Electronic and Computer Engineering, Shenzhen Graduate School, Peking University, Shenzhen, China","institution_ids":["https://openalex.org/I20231570"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"246","last_page":"250"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.994700014591217,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.9425241351127625},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6198769807815552},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5433462858200073},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.5342993140220642},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.48926445841789246},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.47740283608436584},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4518560469150543},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.43729352951049805},{"id":"https://openalex.org/keywords/encoding","display_name":"Encoding (memory)","score":0.4367121458053589},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.43371373414993286},{"id":"https://openalex.org/keywords/coding","display_name":"Coding (social sciences)","score":0.42751461267471313},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3607727289199829},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.19185397028923035},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.152032732963562},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.12839749455451965},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10801532864570618},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08111515641212463}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.9425241351127625},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6198769807815552},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5433462858200073},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.5342993140220642},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.48926445841789246},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.47740283608436584},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4518560469150543},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.43729352951049805},{"id":"https://openalex.org/C125411270","wikidata":"https://www.wikidata.org/wiki/Q18653","display_name":"Encoding (memory)","level":2,"score":0.4367121458053589},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.43371373414993286},{"id":"https://openalex.org/C179518139","wikidata":"https://www.wikidata.org/wiki/Q5140297","display_name":"Coding (social sciences)","level":2,"score":0.42751461267471313},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3607727289199829},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.19185397028923035},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.152032732963562},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.12839749455451965},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10801532864570618},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08111515641212463},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas55924.2022.10090389","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas55924.2022.10090389","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2022 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.9100000262260437}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1999085092","https://openalex.org/W2112796928","https://openalex.org/W2289252105","https://openalex.org/W2405920868","https://openalex.org/W2591601611","https://openalex.org/W2777372517","https://openalex.org/W2792893539","https://openalex.org/W2799821226","https://openalex.org/W2898665561","https://openalex.org/W2898913080","https://openalex.org/W2962835968","https://openalex.org/W2965389440","https://openalex.org/W2966524683","https://openalex.org/W2969812992","https://openalex.org/W3015432327","https://openalex.org/W3026337110","https://openalex.org/W3139521791","https://openalex.org/W4232909776","https://openalex.org/W4295262505","https://openalex.org/W6693397755","https://openalex.org/W6714058667"],"related_works":["https://openalex.org/W4392590355","https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W1976168335","https://openalex.org/W2109451123","https://openalex.org/W4378977321","https://openalex.org/W3211992815","https://openalex.org/W179354024"],"abstract_inverted_index":{"In-memory":[0],"computing":[1,30,144],"(IMC)":[2],"based":[3],"on":[4],"static":[5],"random":[6],"access":[7],"memory":[8,91,113],"(SRAM)":[9],"is":[10,32,45,67,93,138],"a":[11,36,56,96],"promising":[12],"solution":[13],"to":[14,102,117],"enable":[15],"highly":[16],"energy-efficient":[17],"multiply-accumulate":[18],"(MAC)":[19],"operations":[20,78],"for":[21],"machine":[22],"learning":[23],"accelerators.":[24,146],"In":[25],"this":[26],"paper,":[27],"an":[28],"in-SRAM":[29],"technique":[31],"proposed":[33,111],"by":[34],"using":[35],"dual-six-transistor":[37],"(dual-6T)":[38],"SRAM":[39,43,65],"cell.":[40],"The":[41],"dual-6T":[42,64,112],"cell":[44],"composed":[46],"of":[47,69],"two":[48],"conventional-6T-SRAM-cell-like":[49],"6T":[50],"cells":[51],"with":[52,79],"split":[53],"wordlines,":[54],"achieving":[55],"compact":[57,104],"array":[58,92,114],"layout.":[59],"With":[60],"specialized":[61],"coding,":[62,109],"the":[63,70,103,110,141],"circuit":[66],"one":[68],"few":[71],"in-memory":[72,143],"accelerators":[73],"which":[74,137],"support":[75],"parallel":[76],"MAC":[77,145],"both":[80],"ternary":[81,84],"activation":[82],"and":[83,107,125],"weight.":[85],"A":[86],"<tex":[87],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[88,129],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$128\\times":[89],"64$</tex>":[90],"implemented":[94],"in":[95],"55-nm":[97],"low-power":[98],"CMOS":[99],"technology.":[100],"Due":[101],"bitcell":[105],"topology":[106],"smart":[108],"achieves":[115],"up":[116],"635":[118],"TOPS/W":[119],"energy":[120],"efficiency":[121,133],"@":[122,134],"100":[123],"MHz":[124],"38.84":[126],"TOPS/mm":[127],"<sup":[128],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[130],"peak":[131],"area":[132],"350":[135],"MHz,":[136],"competitive":[139],"among":[140],"state-of-the-art":[142]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}