{"id":"https://openalex.org/W2910225835","doi":"https://doi.org/10.1109/apccas.2018.8605710","title":"Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory","display_name":"Transistor Sizing for Parameter Obfuscation of Analog Circuits Using Satisfiability Modulo Theory","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2910225835","doi":"https://doi.org/10.1109/apccas.2018.8605710","mag":"2910225835"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2018.8605710","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2018.8605710","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022476194","display_name":"Vaibhav Venugopal Rao","orcid":"https://orcid.org/0000-0002-9369-1730"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Vaibhav Venugopal Rao","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Drexel University, Philadelphia, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Drexel University, Philadelphia, USA","institution_ids":["https://openalex.org/I72816309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5059641297","display_name":"Ioannis Savidis","orcid":"https://orcid.org/0000-0003-4230-1795"},"institutions":[{"id":"https://openalex.org/I72816309","display_name":"Drexel University","ror":"https://ror.org/04bdffz58","country_code":"US","type":"education","lineage":["https://openalex.org/I72816309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Ioannis Savidis","raw_affiliation_strings":["Department of Electrical and Computer Engineering, Drexel University, Philadelphia, USA"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, Drexel University, Philadelphia, USA","institution_ids":["https://openalex.org/I72816309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5022476194"],"corresponding_institution_ids":["https://openalex.org/I72816309"],"apc_list":null,"apc_paid":null,"fwci":0.7574,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.71730628,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"102","last_page":"106"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12122","display_name":"Physical Unclonable Functions (PUFs) and Hardware Security","score":0.9994000196456909,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.6116495132446289},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5963954925537109},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5579431653022766},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.49262624979019165},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.4740191102027893},{"id":"https://openalex.org/keywords/phase-margin","display_name":"Phase margin","score":0.47398582100868225},{"id":"https://openalex.org/keywords/differential-amplifier","display_name":"Differential amplifier","score":0.4416356086730957},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.42003610730171204},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3700406551361084},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.29847079515457153},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.24909228086471558},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18305379152297974},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.10507217049598694}],"concepts":[{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.6116495132446289},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5963954925537109},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5579431653022766},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.49262624979019165},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.4740191102027893},{"id":"https://openalex.org/C81455027","wikidata":"https://www.wikidata.org/wiki/Q7180955","display_name":"Phase margin","level":5,"score":0.47398582100868225},{"id":"https://openalex.org/C11722477","wikidata":"https://www.wikidata.org/wiki/Q1056298","display_name":"Differential amplifier","level":4,"score":0.4416356086730957},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.42003610730171204},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3700406551361084},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.29847079515457153},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.24909228086471558},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18305379152297974},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.10507217049598694}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2018.8605710","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2018.8605710","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8500000238418579,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2001859357","https://openalex.org/W2046981406","https://openalex.org/W2401875687","https://openalex.org/W2609004879","https://openalex.org/W2625396024","https://openalex.org/W2888592213","https://openalex.org/W6712820193","https://openalex.org/W6754409192"],"related_works":["https://openalex.org/W2184488849","https://openalex.org/W2033616634","https://openalex.org/W3127550692","https://openalex.org/W4379143675","https://openalex.org/W4379137522","https://openalex.org/W1933938913","https://openalex.org/W2391261001","https://openalex.org/W2117019377","https://openalex.org/W2394349332","https://openalex.org/W2074029859"],"abstract_inverted_index":{"In":[0],"this":[1],"paper,":[2],"an":[3],"approach":[4],"is":[5,54,66,88,141,158],"described":[6],"for":[7,120,197,203],"enhancing":[8],"the":[9,38,46,61,75,81,91,112,135,138,144,154,178,186],"security":[10],"of":[11,63,77,93,137,147,153,171,205],"analog":[12,50,188,206],"circuits":[13],"using":[14],"Satisfiability":[15],"Modulo":[16],"Theory":[17],"(SMT)":[18],"based":[19],"design":[20,39,92,189],"space":[21],"exploration.":[22],"The":[23,49,85,102,150,181],"technique":[24],"takes":[25],"as":[26],"inputs":[27],"generic":[28],"circuit":[29,70,207],"equations":[30],"and":[31,97,116,125,192],"performance":[32,83],"constraints":[33],"and,":[34],"by":[35],"exhaustively":[36],"exploring":[37],"space,":[40],"outputs":[41],"transistor":[42,65,195],"sizes":[43,196],"that":[44,79,166,185],"satisfy":[45],"given":[47],"constraints.":[48],"satisfiability":[51],"(aSAT)":[52],"methodology":[53,87,190],"applied":[55],"to":[56,68,110,176],"parameter":[57],"biasing":[58],"obfuscation,":[59],"where":[60],"width":[62],"a":[64,94,98,122,126,130,161,169],"obfuscated":[67],"mask":[69],"properties,":[71],"while":[72,200],"also":[73,201],"limiting":[74],"number":[76],"keys":[78],"produce":[80],"target":[82,145,198],"requirements.":[84],"proposed":[86,187],"used":[89],"in":[90,134,168],"differential":[95,123],"amplifier":[96,124,140,157],"two":[99,155],"stage":[100,156],"amplifier.":[101,128],"widths":[103],"determined":[104],"through":[105],"aSAT":[106],"analysis":[107],"are":[108],"shown":[109],"meet":[111],"gain,":[113],"phase":[114],"margin,":[115],"power":[117],"consumption":[118],"requirements":[119],"both":[121],"two-stage":[127,139],"However,":[129],"7":[131],"MHz":[132],"offset":[133],"gain-bandwidth":[136],"observed":[142],"from":[143],"value":[146],"30":[148],"MHz.":[149],"total":[151],"gain":[152],"masked":[159],"with":[160],"24":[162],"bit":[163],"encryption":[164],"key":[165],"results":[167,183],"probability":[170],"5.96\u00d710":[172],"<sup":[173],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[174],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-08</sup>":[175],"determine":[177],"correct":[179],"key.":[180],"simulated":[182],"indicate":[184],"quickly":[191],"accurately":[193],"determines":[194],"specifications,":[199],"accounting":[202],"obfuscation":[204],"parameters.":[208]},"counts_by_year":[{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2017,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
