{"id":"https://openalex.org/W2910220305","doi":"https://doi.org/10.1109/apccas.2018.8605642","title":"A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic","display_name":"A 7.8 fJ/conversion-step 9-bit 400-MS/s single-channel SAR ADC with fast control logic","publication_year":2018,"publication_date":"2018-10-01","ids":{"openalex":"https://openalex.org/W2910220305","doi":"https://doi.org/10.1109/apccas.2018.8605642","mag":"2910220305"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2018.8605642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2018.8605642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5022489940","display_name":"Zhekan Ni","orcid":null},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Zhekan Ni","raw_affiliation_strings":["State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101867100","display_name":"Yongzhen Chen","orcid":"https://orcid.org/0000-0002-1018-6289"},"institutions":[{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yongzhen Chen","raw_affiliation_strings":["State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5025053306","display_name":"Fan Ye","orcid":"https://orcid.org/0000-0002-1089-1498"},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Fan Ye","raw_affiliation_strings":["State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016448886","display_name":"Junyan Ren","orcid":"https://orcid.org/0000-0002-7799-6251"},"institutions":[{"id":"https://openalex.org/I4391767673","display_name":"State Key Laboratory of ASIC and System","ror":"https://ror.org/01mamgv83","country_code":null,"type":"facility","lineage":["https://openalex.org/I24943067","https://openalex.org/I4391767673"]},{"id":"https://openalex.org/I24943067","display_name":"Fudan University","ror":"https://ror.org/013q1eq08","country_code":"CN","type":"education","lineage":["https://openalex.org/I24943067"]},{"id":"https://openalex.org/I4210132426","display_name":"Shanghai Fudan Microelectronics (China)","ror":"https://ror.org/02vfj3j86","country_code":"CN","type":"company","lineage":["https://openalex.org/I4210132426"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Junyan Ren","raw_affiliation_strings":["State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China"],"affiliations":[{"raw_affiliation_string":"State Key Laboratory of ASIC and System, School of Microelectronics, Fudan University, Shanghai, P. R. China","institution_ids":["https://openalex.org/I4210132426","https://openalex.org/I24943067","https://openalex.org/I4391767673"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5022489940"],"corresponding_institution_ids":["https://openalex.org/I24943067","https://openalex.org/I4210132426","https://openalex.org/I4391767673"],"apc_list":null,"apc_paid":null,"fwci":0.109,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.47414825,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"42","last_page":"45"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/successive-approximation-adc","display_name":"Successive approximation ADC","score":0.7499516010284424},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.661833643913269},{"id":"https://openalex.org/keywords/capacitance","display_name":"Capacitance","score":0.6148446202278137},{"id":"https://openalex.org/keywords/control-logic","display_name":"Control logic","score":0.5925928950309753},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5804904699325562},{"id":"https://openalex.org/keywords/figure-of-merit","display_name":"Figure of merit","score":0.5199952721595764},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.475167453289032},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4659750163555145},{"id":"https://openalex.org/keywords/parasitic-capacitance","display_name":"Parasitic capacitance","score":0.46207740902900696},{"id":"https://openalex.org/keywords/weighting","display_name":"Weighting","score":0.4395575225353241},{"id":"https://openalex.org/keywords/12-bit","display_name":"12-bit","score":0.4286402463912964},{"id":"https://openalex.org/keywords/sampling","display_name":"Sampling (signal processing)","score":0.41739532351493835},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4118337333202362},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3563060164451599},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.34103062748908997},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.32917752861976624},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.29681146144866943},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2915305197238922},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.16206687688827515},{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.15938037633895874}],"concepts":[{"id":"https://openalex.org/C60154766","wikidata":"https://www.wikidata.org/wiki/Q2650458","display_name":"Successive approximation ADC","level":4,"score":0.7499516010284424},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.661833643913269},{"id":"https://openalex.org/C30066665","wikidata":"https://www.wikidata.org/wiki/Q164399","display_name":"Capacitance","level":3,"score":0.6148446202278137},{"id":"https://openalex.org/C2776350369","wikidata":"https://www.wikidata.org/wiki/Q843479","display_name":"Control logic","level":2,"score":0.5925928950309753},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5804904699325562},{"id":"https://openalex.org/C130277099","wikidata":"https://www.wikidata.org/wiki/Q3676605","display_name":"Figure of merit","level":2,"score":0.5199952721595764},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.475167453289032},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4659750163555145},{"id":"https://openalex.org/C154318817","wikidata":"https://www.wikidata.org/wiki/Q2157249","display_name":"Parasitic capacitance","level":4,"score":0.46207740902900696},{"id":"https://openalex.org/C183115368","wikidata":"https://www.wikidata.org/wiki/Q856577","display_name":"Weighting","level":2,"score":0.4395575225353241},{"id":"https://openalex.org/C2776310492","wikidata":"https://www.wikidata.org/wiki/Q3271420","display_name":"12-bit","level":3,"score":0.4286402463912964},{"id":"https://openalex.org/C140779682","wikidata":"https://www.wikidata.org/wiki/Q210868","display_name":"Sampling (signal processing)","level":3,"score":0.41739532351493835},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4118337333202362},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3563060164451599},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.34103062748908997},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.32917752861976624},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.29681146144866943},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2915305197238922},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.16206687688827515},{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.15938037633895874},{"id":"https://openalex.org/C24890656","wikidata":"https://www.wikidata.org/wiki/Q82811","display_name":"Acoustics","level":1,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C17525397","wikidata":"https://www.wikidata.org/wiki/Q176140","display_name":"Electrode","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2018.8605642","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2018.8605642","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8399999737739563}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W2069498033","https://openalex.org/W2101004723","https://openalex.org/W2132406028","https://openalex.org/W2531986428","https://openalex.org/W2801227755","https://openalex.org/W2801253174"],"related_works":["https://openalex.org/W2488845768","https://openalex.org/W2805237214","https://openalex.org/W2008952700","https://openalex.org/W2593068112","https://openalex.org/W3128305238","https://openalex.org/W2744979315","https://openalex.org/W2805845672","https://openalex.org/W4387941295","https://openalex.org/W2906373115","https://openalex.org/W2897882318"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,24,36,47,62,95,108],"9-bit":[4],"400-MS/s":[5],"successive":[6],"approximation":[7],"register":[8],"(SAR)":[9],"analog-to-digital":[10],"converter":[11],"(ADC)":[12],"with":[13],"hybrid":[14,30],"arranged":[15,31],"capacitor":[16,50],"array.":[17],"High-speed":[18],"operation":[19],"is":[20,105],"achieved":[21],"by":[22],"introducing":[23],"redundant":[25],"weighting":[26],"method":[27],"into":[28],"the":[29,42,57,81],"SAR":[32,58],"CDAC":[33],"and":[34,89,113],"using":[35,46],"fast":[37],"control":[38],"logic":[39],"which":[40,51],"shorten":[41],"critical":[43],"path.":[44],"By":[45],"custom-designed":[48],"unit":[49],"minimizes":[52],"top":[53],"plate":[54],"parasitic":[55],"capacitance,":[56],"ADC":[59,82,104],"can":[60],"realize":[61],"wide":[63],"input":[64],"range":[65],"of":[66,86,97,100,118],"1.6":[67],"V":[68],"<sub":[69],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[70],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">diff,p-p</sub>":[71],"at":[72],"1-V":[73],"reference":[74],"voltage.":[75],"At":[76],"400":[77],"MS/s":[78],"sampling":[79],"rate,":[80],"achieves":[83],"an":[84,115],"SNDR":[85],"52.47":[87],"dB":[88],"consumes":[90],"1.19":[91],"mW,":[92],"resulting":[93],"in":[94,107],"figure":[96],"merit":[98],"(FOM)":[99],"7.8":[101],"fJ/conversion-step.":[102],"The":[103],"fabricated":[106],"28":[109],"nm":[110],"CMOS":[111],"technology":[112],"occupies":[114],"active":[116],"area":[117],"171":[119],"\u03bcm":[120],"\u00d7":[121],"112":[122],"\u03bcm.":[123]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2022,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
