{"id":"https://openalex.org/W2069466745","doi":"https://doi.org/10.1109/apccas.2014.7032887","title":"Timing error prediction based adaptive voltage scaling for dynamic variation tolerance","display_name":"Timing error prediction based adaptive voltage scaling for dynamic variation tolerance","publication_year":2014,"publication_date":"2014-11-01","ids":{"openalex":"https://openalex.org/W2069466745","doi":"https://doi.org/10.1109/apccas.2014.7032887","mag":"2069466745"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2014.7032887","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2014.7032887","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5057291086","display_name":"Weiwei Shan","orcid":"https://orcid.org/0000-0001-5520-1326"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Weiwei Shan","raw_affiliation_strings":["National ASIC system and research engineering center, Southeast University, Nanjing, Jiangsu, China","National ASIC system and research engineering center, Southeast University, Sipailou 2#, Nanjing, Jiangsu 210096, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC system and research engineering center, Southeast University, Nanjing, Jiangsu, China","institution_ids":["https://openalex.org/I76569877"]},{"raw_affiliation_string":"National ASIC system and research engineering center, Southeast University, Sipailou 2#, Nanjing, Jiangsu 210096, China","institution_ids":["https://openalex.org/I76569877"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5100623386","display_name":"Zhipeng Xu","orcid":"https://orcid.org/0000-0003-1734-2077"},"institutions":[{"id":"https://openalex.org/I76569877","display_name":"Southeast University","ror":"https://ror.org/04ct4d772","country_code":"CN","type":"education","lineage":["https://openalex.org/I76569877"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhipeng Xu","raw_affiliation_strings":["National ASIC system and research engineering center, Southeast University, Nanjing, Jiangsu, China","National ASIC system and research engineering center, Southeast University, Sipailou 2#, Nanjing, Jiangsu 210096, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"National ASIC system and research engineering center, Southeast University, Nanjing, Jiangsu, China","institution_ids":["https://openalex.org/I76569877"]},{"raw_affiliation_string":"National ASIC system and research engineering center, Southeast University, Sipailou 2#, Nanjing, Jiangsu 210096, China","institution_ids":["https://openalex.org/I76569877"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I76569877"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":6,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"739","last_page":"742"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6491091251373291},{"id":"https://openalex.org/keywords/process-corners","display_name":"Process corners","score":0.62723708152771},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6162883043289185},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.6077552437782288},{"id":"https://openalex.org/keywords/process-variation","display_name":"Process variation","score":0.5769598484039307},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5369095206260681},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5053349137306213},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.5049627423286438},{"id":"https://openalex.org/keywords/replica","display_name":"Replica","score":0.45890894532203674},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.45332565903663635},{"id":"https://openalex.org/keywords/low-power-electronics","display_name":"Low-power electronics","score":0.4465053081512451},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4262068271636963},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.425723671913147},{"id":"https://openalex.org/keywords/scalability","display_name":"Scalability","score":0.41650041937828064},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.4158175587654114},{"id":"https://openalex.org/keywords/critical-path-method","display_name":"Critical path method","score":0.41400641202926636},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36040836572647095},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.33588308095932007},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.2567688524723053},{"id":"https://openalex.org/keywords/power-consumption","display_name":"Power consumption","score":0.24338364601135254},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17917948961257935}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6491091251373291},{"id":"https://openalex.org/C192615534","wikidata":"https://www.wikidata.org/wiki/Q7247268","display_name":"Process corners","level":3,"score":0.62723708152771},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6162883043289185},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.6077552437782288},{"id":"https://openalex.org/C93389723","wikidata":"https://www.wikidata.org/wiki/Q7247313","display_name":"Process variation","level":3,"score":0.5769598484039307},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5369095206260681},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5053349137306213},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.5049627423286438},{"id":"https://openalex.org/C2775937380","wikidata":"https://www.wikidata.org/wiki/Q1232589","display_name":"Replica","level":2,"score":0.45890894532203674},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.45332565903663635},{"id":"https://openalex.org/C117551214","wikidata":"https://www.wikidata.org/wiki/Q6692774","display_name":"Low-power electronics","level":4,"score":0.4465053081512451},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4262068271636963},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.425723671913147},{"id":"https://openalex.org/C48044578","wikidata":"https://www.wikidata.org/wiki/Q727490","display_name":"Scalability","level":2,"score":0.41650041937828064},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.4158175587654114},{"id":"https://openalex.org/C115874739","wikidata":"https://www.wikidata.org/wiki/Q825377","display_name":"Critical path method","level":2,"score":0.41400641202926636},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36040836572647095},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.33588308095932007},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.2567688524723053},{"id":"https://openalex.org/C2984118289","wikidata":"https://www.wikidata.org/wiki/Q29954","display_name":"Power consumption","level":3,"score":0.24338364601135254},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17917948961257935},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C77088390","wikidata":"https://www.wikidata.org/wiki/Q8513","display_name":"Database","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C153349607","wikidata":"https://www.wikidata.org/wiki/Q36649","display_name":"Visual arts","level":1,"score":0.0},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2014.7032887","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2014.7032887","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8399999737739563,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1980383018","https://openalex.org/W1984996269","https://openalex.org/W2018513762","https://openalex.org/W2060406996","https://openalex.org/W2103551037","https://openalex.org/W2106648230"],"related_works":["https://openalex.org/W4235807419","https://openalex.org/W2144633290","https://openalex.org/W2525077515","https://openalex.org/W2118152793","https://openalex.org/W2827496155","https://openalex.org/W2160859600","https://openalex.org/W2141625582","https://openalex.org/W3092420867","https://openalex.org/W2550704533","https://openalex.org/W2037625031"],"abstract_inverted_index":{"There":[0,35],"is":[1,101,118,156],"always":[2],"some":[3],"conservative":[4],"timing":[5,26,44,49,76,86,95,139,206],"margin":[6,27,87],"to":[7,11,29,40,46,73,83,103,193],"ensure":[8],"the":[9,25,42,48,64,75,85,97,105,135,195,205],"chip":[10],"work":[12],"properly":[13],"under":[14,123,170],"PVT":[15],"variations":[16],"during":[17],"integrated":[18],"circuit":[19,196],"design":[20],"time.":[21],"The":[22,115,147,180],"existence":[23],"of":[24,32,132,182],"leads":[28],"a":[30,59,121,129],"waste":[31],"power":[33,154,201],"consumption.":[34],"are":[36,58],"many":[37],"adaptive":[38,111],"techniques":[39],"monitor":[41,74],"on-chip":[43],"error":[45,77,98],"reduce":[47],"error.":[50],"In":[51,81],"this":[52],"paper,":[53],"tunable":[54],"replica":[55,136],"paths":[56,67],"which":[57],"little":[60],"more":[61],"critical":[62,66],"than":[63],"original":[65],"have":[68],"been":[69],"designed":[70],"and":[71,138,178],"used":[72,119],"with":[78,128,134,162],"double-sampling":[79],"monitors.":[80],"order":[82],"eliminate":[84],"as":[88,90],"much":[89],"possible":[91],"without":[92],"causing":[93],"real":[94],"errors,":[96],"prediction":[99,107,140],"probability":[100],"analyzed":[102],"set":[104],"proper":[106],"alarm":[108],"threshold":[109],"for":[110],"voltage":[112],"scaling":[113],"scheme.":[114],"whole":[116],"scheme":[117,164],"on":[120],"system-on-chip":[122],"TSMC":[124],"65nm":[125],"CMOS":[126],"process":[127,172],"layout":[130],"area":[131,145],"2000\u03bcm~1180\u03bcm,":[133],"path":[137],"mechanism":[141],"costing":[142],"only":[143],"2.7%":[144],"overhead.":[146],"post":[148],"simulation":[149],"results":[150],"show":[151],"that":[152,188],"its":[153],"reduction":[155,202],"between":[157],"31.5%":[158],"~":[159],"42.2%":[160],"compared":[161],"non-DVS":[163],"at":[165],"400MHz":[166],"frequency,":[167],"25":[168],"\u00b0C,":[169],"different":[171],"corners":[173],"(FF,":[174],"FS,":[175],"TT,":[176],"SF":[177],"SS).":[179],"advantage":[181],"our":[183],"proposed":[184],"method":[185],"lies":[186],"in":[187],"it":[189],"does":[190],"not":[191],"need":[192],"break":[194],"architecture":[197],"while":[198],"offering":[199],"decent":[200],"by":[203],"reducing":[204],"margin.":[207]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":1},{"year":2015,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}