{"id":"https://openalex.org/W1977144597","doi":"https://doi.org/10.1109/apccas.2014.7032857","title":"Adjacent common centroid placement for analog IC layout design","display_name":"Adjacent common centroid placement for analog IC layout design","publication_year":2014,"publication_date":"2014-11-01","ids":{"openalex":"https://openalex.org/W1977144597","doi":"https://doi.org/10.1109/apccas.2014.7032857","mag":"1977144597"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2014.7032857","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2014.7032857","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5001718695","display_name":"Kenichiro Murotatsu","orcid":null},"institutions":[{"id":"https://openalex.org/I92614990","display_name":"Tokyo University of Agriculture and Technology","ror":"https://ror.org/00qg0kr10","country_code":"JP","type":"education","lineage":["https://openalex.org/I92614990"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kenichiro Murotatsu","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology","Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology","institution_ids":["https://openalex.org/I92614990"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology,","institution_ids":["https://openalex.org/I92614990"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5056617412","display_name":"Kunihiro Fujiyoshi","orcid":null},"institutions":[{"id":"https://openalex.org/I92614990","display_name":"Tokyo University of Agriculture and Technology","ror":"https://ror.org/00qg0kr10","country_code":"JP","type":"education","lineage":["https://openalex.org/I92614990"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Kunihiro Fujiyoshi","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology","Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology,"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology","institution_ids":["https://openalex.org/I92614990"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Tokyo University of Agriculture and Technology,","institution_ids":["https://openalex.org/I92614990"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I92614990"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.04845415,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"e86 a","issue":null,"first_page":"619","last_page":"622"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/centroid","display_name":"Centroid","score":0.9106693267822266},{"id":"https://openalex.org/keywords/simulated-annealing","display_name":"Simulated annealing","score":0.6909279823303223},{"id":"https://openalex.org/keywords/constraint","display_name":"Constraint (computer-aided design)","score":0.6239306330680847},{"id":"https://openalex.org/keywords/point","display_name":"Point (geometry)","score":0.53776615858078},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5320972204208374},{"id":"https://openalex.org/keywords/center","display_name":"Center (category theory)","score":0.4567159414291382},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3929140269756317},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.3906179368495941},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3279705047607422},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.279849648475647},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.2047998309135437},{"id":"https://openalex.org/keywords/combinatorics","display_name":"Combinatorics","score":0.09659796953201294},{"id":"https://openalex.org/keywords/geometry","display_name":"Geometry","score":0.08453765511512756}],"concepts":[{"id":"https://openalex.org/C146599234","wikidata":"https://www.wikidata.org/wiki/Q511093","display_name":"Centroid","level":2,"score":0.9106693267822266},{"id":"https://openalex.org/C126980161","wikidata":"https://www.wikidata.org/wiki/Q863783","display_name":"Simulated annealing","level":2,"score":0.6909279823303223},{"id":"https://openalex.org/C2776036281","wikidata":"https://www.wikidata.org/wiki/Q48769818","display_name":"Constraint (computer-aided design)","level":2,"score":0.6239306330680847},{"id":"https://openalex.org/C28719098","wikidata":"https://www.wikidata.org/wiki/Q44946","display_name":"Point (geometry)","level":2,"score":0.53776615858078},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5320972204208374},{"id":"https://openalex.org/C2779463800","wikidata":"https://www.wikidata.org/wiki/Q5062222","display_name":"Center (category theory)","level":2,"score":0.4567159414291382},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3929140269756317},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.3906179368495941},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3279705047607422},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.279849648475647},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.2047998309135437},{"id":"https://openalex.org/C114614502","wikidata":"https://www.wikidata.org/wiki/Q76592","display_name":"Combinatorics","level":1,"score":0.09659796953201294},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.08453765511512756},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C8010536","wikidata":"https://www.wikidata.org/wiki/Q160398","display_name":"Crystallography","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2014.7032857","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2014.7032857","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":24,"referenced_works":["https://openalex.org/W1998168457","https://openalex.org/W2016160133","https://openalex.org/W2055740165","https://openalex.org/W2097799663","https://openalex.org/W2098414328","https://openalex.org/W2105010240","https://openalex.org/W2113530102","https://openalex.org/W2127012874","https://openalex.org/W2144473140","https://openalex.org/W2160298069","https://openalex.org/W2163310585","https://openalex.org/W2237590650","https://openalex.org/W2327671054","https://openalex.org/W3145854928","https://openalex.org/W3150574859","https://openalex.org/W4230800282","https://openalex.org/W4236427075","https://openalex.org/W4236626993","https://openalex.org/W6664417497","https://openalex.org/W6674963866","https://openalex.org/W6675602057","https://openalex.org/W6678589545","https://openalex.org/W6683393535","https://openalex.org/W6689845041"],"related_works":["https://openalex.org/W2381926679","https://openalex.org/W2007009951","https://openalex.org/W2082644203","https://openalex.org/W2350539780","https://openalex.org/W3165040664","https://openalex.org/W3122652148","https://openalex.org/W1583866266","https://openalex.org/W4242386713","https://openalex.org/W2996505764","https://openalex.org/W3088649123"],"abstract_inverted_index":{"To":[0],"improve":[1],"immunity":[2],"against":[3],"process":[4],"gradients,":[5],"common":[6,23,51,60,85],"centroid":[7,52],"constraint,":[8],"in":[9,49,79],"which":[10,72],"every":[11],"pair":[12],"of":[13,63,92],"elements":[14],"should":[15,54],"be":[16,55],"placed":[17,56],"symmetrically":[18],"with":[19],"respect":[20],"to":[21,31,58,83],"a":[22,33,50],"center":[24,61,86],"point,":[25,87],"is":[26],"widely":[27],"used.":[28],"Several":[29],"methods":[30,71,94],"obtain":[32],"good":[34],"placement":[35],"satisfying":[36],"the":[37,59,64,84,90,93],"constraint":[38],"by":[39,95],"using":[40],"sequence-pair":[41],"and":[42,75,88],"Simulated":[43],"Annealing":[44],"were":[45],"proposed.":[46],"However,":[47],"cells":[48,78],"group":[53,81],"close":[57,82],"point":[62],"group.":[65],"In":[66],"this":[67],"paper,":[68],"we":[69],"propose":[70],"use":[73],"mathematical-programming":[74],"can":[76],"place":[77],"each":[80],"check":[89],"effectiveness":[91],"experimental":[96],"comparisons.":[97]},"counts_by_year":[{"year":2024,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}