{"id":"https://openalex.org/W2074318875","doi":"https://doi.org/10.1109/apccas.2014.7032782","title":"Timing analysis and optimization of voltage scaled CMOS digital circuits with dual-V&lt;inf&gt;th&lt;/inf&gt; devices","display_name":"Timing analysis and optimization of voltage scaled CMOS digital circuits with dual-V&lt;inf&gt;th&lt;/inf&gt; devices","publication_year":2014,"publication_date":"2014-11-01","ids":{"openalex":"https://openalex.org/W2074318875","doi":"https://doi.org/10.1109/apccas.2014.7032782","mag":"2074318875"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2014.7032782","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2014.7032782","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5089885852","display_name":"Anne Lorraine Luna","orcid":null},"institutions":[{"id":"https://openalex.org/I87074743","display_name":"University of the Philippines Diliman","ror":"https://ror.org/03tbh6y23","country_code":"PH","type":"education","lineage":["https://openalex.org/I103911934","https://openalex.org/I87074743"]}],"countries":["PH"],"is_corresponding":true,"raw_author_name":"Anne Lorraine S. Luna","raw_affiliation_strings":["Electrical and Electronics Engineering Institute, University of the Philippines, Diliman","Electrical and Electronics Engineering Institute, University of the Philippines-Diliman"],"affiliations":[{"raw_affiliation_string":"Electrical and Electronics Engineering Institute, University of the Philippines, Diliman","institution_ids":["https://openalex.org/I87074743"]},{"raw_affiliation_string":"Electrical and Electronics Engineering Institute, University of the Philippines-Diliman","institution_ids":["https://openalex.org/I87074743"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5112421035","display_name":"John Richard E. Hizon","orcid":null},"institutions":[{"id":"https://openalex.org/I87074743","display_name":"University of the Philippines Diliman","ror":"https://ror.org/03tbh6y23","country_code":"PH","type":"education","lineage":["https://openalex.org/I103911934","https://openalex.org/I87074743"]}],"countries":["PH"],"is_corresponding":false,"raw_author_name":"John Richard E. Hizon","raw_affiliation_strings":["Electrical and Electronics Engineering Institute, University of the Philippines, Diliman","Electrical and Electronics Engineering Institute, University of the Philippines-Diliman"],"affiliations":[{"raw_affiliation_string":"Electrical and Electronics Engineering Institute, University of the Philippines, Diliman","institution_ids":["https://openalex.org/I87074743"]},{"raw_affiliation_string":"Electrical and Electronics Engineering Institute, University of the Philippines-Diliman","institution_ids":["https://openalex.org/I87074743"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5064490279","display_name":"Louis P. Alarc\u00f3n","orcid":null},"institutions":[{"id":"https://openalex.org/I87074743","display_name":"University of the Philippines Diliman","ror":"https://ror.org/03tbh6y23","country_code":"PH","type":"education","lineage":["https://openalex.org/I103911934","https://openalex.org/I87074743"]}],"countries":["PH"],"is_corresponding":false,"raw_author_name":"Louis P. Alarcon","raw_affiliation_strings":["Electrical and Electronics Engineering Institute, University of the Philippines, Diliman","Electrical and Electronics Engineering Institute, University of the Philippines-Diliman"],"affiliations":[{"raw_affiliation_string":"Electrical and Electronics Engineering Institute, University of the Philippines, Diliman","institution_ids":["https://openalex.org/I87074743"]},{"raw_affiliation_string":"Electrical and Electronics Engineering Institute, University of the Philippines-Diliman","institution_ids":["https://openalex.org/I87074743"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5089885852"],"corresponding_institution_ids":["https://openalex.org/I87074743"],"apc_list":null,"apc_paid":null,"fwci":0.4187,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.68614838,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"312","last_page":"315"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11005","display_name":"Radiation Effects in Electronics","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/standard-cell","display_name":"Standard cell","score":0.7420385479927063},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.7233482003211975},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5990671515464783},{"id":"https://openalex.org/keywords/microcontroller","display_name":"Microcontroller","score":0.5612068176269531},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5410273671150208},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.49359405040740967},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.49242720007896423},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.47250688076019287},{"id":"https://openalex.org/keywords/design-flow","display_name":"Design flow","score":0.4618794620037079},{"id":"https://openalex.org/keywords/integrated-circuit-design","display_name":"Integrated circuit design","score":0.4334329068660736},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.43274733424186707},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.4186326265335083},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.37617096304893494},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.25684165954589844},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.25408923625946045},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.22215664386749268}],"concepts":[{"id":"https://openalex.org/C78401558","wikidata":"https://www.wikidata.org/wiki/Q464496","display_name":"Standard cell","level":3,"score":0.7420385479927063},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.7233482003211975},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5990671515464783},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.5612068176269531},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5410273671150208},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.49359405040740967},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.49242720007896423},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.47250688076019287},{"id":"https://openalex.org/C37135326","wikidata":"https://www.wikidata.org/wiki/Q931942","display_name":"Design flow","level":2,"score":0.4618794620037079},{"id":"https://openalex.org/C74524168","wikidata":"https://www.wikidata.org/wiki/Q1074539","display_name":"Integrated circuit design","level":2,"score":0.4334329068660736},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.43274733424186707},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.4186326265335083},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.37617096304893494},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.25684165954589844},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.25408923625946045},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.22215664386749268},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2014.7032782","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2014.7032782","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2014 IEEE Asia Pacific Conference on Circuits and Systems (APCCAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8700000047683716}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2124962573","https://openalex.org/W2129984271","https://openalex.org/W2157024459","https://openalex.org/W2795072209","https://openalex.org/W6749692432"],"related_works":["https://openalex.org/W2031753133","https://openalex.org/W2151657833","https://openalex.org/W2070693700","https://openalex.org/W1596716095","https://openalex.org/W2577477803","https://openalex.org/W1995592656","https://openalex.org/W2156138647","https://openalex.org/W1617216077","https://openalex.org/W1987597317","https://openalex.org/W2489470952"],"abstract_inverted_index":{"Supply":[0],"voltage":[1,53,88],"scaling":[2],"greatly":[3],"reduces":[4],"the":[5,41,51,70,86,152,162,167,173],"power":[6,22],"consumption":[7],"of":[8,35,72,101,121,166],"circuits":[9,47,73],"and":[10,54,119,143],"is":[11,38,58,124,135,144],"typically":[12],"used":[13],"in":[14,40,137],"applications":[15],"with":[16,77],"loose":[17],"speed":[18],"constraints":[19],"but":[20,161],"tight":[21],"budgets.":[23],"However,":[24,63],"without":[25],"digital":[26,46,141],"standard":[27,75,168],"cell":[28,169],"libraries":[29,170],"characterized":[30],"at":[31,50,60,99,105],"low":[32,61],"voltages,":[33],"integration":[34],"this":[36,64],"technique":[37],"difficult":[39],"semi-custom":[42],"design":[43],"flow.":[44],"Thus,":[45],"are":[48,98],"synthesized":[49],"nominal":[52],"their":[55],"operating":[56],"frequency":[57],"estimated":[59],"voltages.":[62],"existing":[65],"approach":[66],"does":[67],"not":[68],"guarantee":[69],"timing":[71,111,117],"containing":[74],"cells":[76],"multiple":[78],"threshold":[79],"voltages":[80,107],"whose":[81],"delays":[82],"scale":[83],"differently":[84],"as":[85,151],"supply":[87],"decreases.":[89],"Slow":[90],"high":[91],"V":[92],"<sub":[93,129],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[94,130],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">th</sub>":[95,131],"non-critical":[96],"paths":[97,104,123,160],"risk":[100],"becoming":[102],"critical":[103],"lower":[106],"that":[108],"can":[109],"cause":[110],"errors.":[112,176],"A":[113],"new":[114],"framework":[115,134],"for":[116,127],"analysis":[118],"removal":[120],"violating":[122,159],"then":[125],"proposed":[126],"dual-V":[128],"circuits.":[132],"The":[133,155],"integrated":[136],"a":[138],"65nm":[139],"CMOS":[140],"flow":[142],"verified":[145],"using":[146],"an":[147],"8-bit":[148],"microcontroller":[149],"core":[150],"input":[153],"design.":[154],"method":[156],"successfully":[157],"eliminated":[158],"35%-61%":[163],"delay":[164,174],"margin":[165],"contributed":[171],"to":[172],"estimation":[175]},"counts_by_year":[{"year":2017,"cited_by_count":1},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
