{"id":"https://openalex.org/W2039300175","doi":"https://doi.org/10.1109/apccas.2012.6419113","title":"Simultaneous wafer bonding type selection and layer assignment for TSV count minimization","display_name":"Simultaneous wafer bonding type selection and layer assignment for TSV count minimization","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W2039300175","doi":"https://doi.org/10.1109/apccas.2012.6419113","mag":"2039300175"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2012.6419113","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6419113","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059158206","display_name":"Chun-Hua Cheng","orcid":null},"institutions":[{"id":"https://openalex.org/I151221077","display_name":"Chung Yuan Christian University","ror":"https://ror.org/02w8ws377","country_code":"TW","type":"education","lineage":["https://openalex.org/I151221077"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chun-Hua Cheng","raw_affiliation_strings":["Department of Electronic Engineering, Chung Yuan Christian University, Chung Li, Taiwan","Dept. of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Chung Yuan Christian University, Chung Li, Taiwan","institution_ids":["https://openalex.org/I151221077"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C","institution_ids":["https://openalex.org/I151221077"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5070406482","display_name":"Wei-Shuo Tzeng","orcid":null},"institutions":[{"id":"https://openalex.org/I151221077","display_name":"Chung Yuan Christian University","ror":"https://ror.org/02w8ws377","country_code":"TW","type":"education","lineage":["https://openalex.org/I151221077"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Wei-Shuo Tzeng","raw_affiliation_strings":["Department of Electronic Engineering, Chung Yuan Christian University, Chung Li, Taiwan","Dept. of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Chung Yuan Christian University, Chung Li, Taiwan","institution_ids":["https://openalex.org/I151221077"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C","institution_ids":["https://openalex.org/I151221077"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060945705","display_name":"Shih-Hsu Huang","orcid":"https://orcid.org/0000-0001-8908-8384"},"institutions":[{"id":"https://openalex.org/I151221077","display_name":"Chung Yuan Christian University","ror":"https://ror.org/02w8ws377","country_code":"TW","type":"education","lineage":["https://openalex.org/I151221077"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shih-Hsu Huang","raw_affiliation_strings":["Department of Electronic Engineering, Chung Yuan Christian University, Chung Li, Taiwan","Dept. of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electronic Engineering, Chung Yuan Christian University, Chung Li, Taiwan","institution_ids":["https://openalex.org/I151221077"]},{"raw_affiliation_string":"Dept. of Electronic Engineering, Chung Yuan Christian University, Chung-Li, Taiwan, R.O.C","institution_ids":["https://openalex.org/I151221077"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I151221077"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.15124722,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"27","issue":null,"first_page":"627","last_page":"630"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11338","display_name":"Advancements in Photolithography Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.763387143611908},{"id":"https://openalex.org/keywords/wafer","display_name":"Wafer","score":0.7026544213294983},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.6826487183570862},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.6309183239936829},{"id":"https://openalex.org/keywords/selection","display_name":"Selection (genetic algorithm)","score":0.5992089509963989},{"id":"https://openalex.org/keywords/layer","display_name":"Layer (electronics)","score":0.5817182660102844},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.544912576675415},{"id":"https://openalex.org/keywords/three-dimensional-integrated-circuit","display_name":"Three-dimensional integrated circuit","score":0.5288649201393127},{"id":"https://openalex.org/keywords/integer","display_name":"Integer (computer science)","score":0.4939008355140686},{"id":"https://openalex.org/keywords/linear-programming","display_name":"Linear programming","score":0.4464428722858429},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.42951700091362},{"id":"https://openalex.org/keywords/through-silicon-via","display_name":"Through-silicon via","score":0.41942036151885986},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3766939043998718},{"id":"https://openalex.org/keywords/mathematical-optimization","display_name":"Mathematical optimization","score":0.32060813903808594},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.30285966396331787},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.27045536041259766},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.261074960231781},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.23502814769744873},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1376611292362213},{"id":"https://openalex.org/keywords/nanotechnology","display_name":"Nanotechnology","score":0.11322426795959473},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.08522406220436096}],"concepts":[{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.763387143611908},{"id":"https://openalex.org/C160671074","wikidata":"https://www.wikidata.org/wiki/Q267131","display_name":"Wafer","level":2,"score":0.7026544213294983},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.6826487183570862},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.6309183239936829},{"id":"https://openalex.org/C81917197","wikidata":"https://www.wikidata.org/wiki/Q628760","display_name":"Selection (genetic algorithm)","level":2,"score":0.5992089509963989},{"id":"https://openalex.org/C2779227376","wikidata":"https://www.wikidata.org/wiki/Q6505497","display_name":"Layer (electronics)","level":2,"score":0.5817182660102844},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.544912576675415},{"id":"https://openalex.org/C59088047","wikidata":"https://www.wikidata.org/wiki/Q229370","display_name":"Three-dimensional integrated circuit","level":3,"score":0.5288649201393127},{"id":"https://openalex.org/C97137487","wikidata":"https://www.wikidata.org/wiki/Q729138","display_name":"Integer (computer science)","level":2,"score":0.4939008355140686},{"id":"https://openalex.org/C41045048","wikidata":"https://www.wikidata.org/wiki/Q202843","display_name":"Linear programming","level":2,"score":0.4464428722858429},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.42951700091362},{"id":"https://openalex.org/C45632049","wikidata":"https://www.wikidata.org/wiki/Q1578120","display_name":"Through-silicon via","level":3,"score":0.41942036151885986},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3766939043998718},{"id":"https://openalex.org/C126255220","wikidata":"https://www.wikidata.org/wiki/Q141495","display_name":"Mathematical optimization","level":1,"score":0.32060813903808594},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.30285966396331787},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.27045536041259766},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.261074960231781},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.23502814769744873},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1376611292362213},{"id":"https://openalex.org/C171250308","wikidata":"https://www.wikidata.org/wiki/Q11468","display_name":"Nanotechnology","level":1,"score":0.11322426795959473},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.08522406220436096},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2012.6419113","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6419113","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/9","score":0.41999998688697815,"display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1506241038","https://openalex.org/W1968609578","https://openalex.org/W2029436511","https://openalex.org/W2031579205","https://openalex.org/W2089322412","https://openalex.org/W2120238222","https://openalex.org/W2130648999","https://openalex.org/W2148075774","https://openalex.org/W2295370265","https://openalex.org/W2536066754","https://openalex.org/W6697128566","https://openalex.org/W6728469656"],"related_works":["https://openalex.org/W2016970881","https://openalex.org/W2027159884","https://openalex.org/W1990828594","https://openalex.org/W2333804548","https://openalex.org/W2534942874","https://openalex.org/W3093450488","https://openalex.org/W2016589506","https://openalex.org/W2376702355","https://openalex.org/W4385062230","https://openalex.org/W2084347051"],"abstract_inverted_index":{"TSV":[0,46,101,127,150],"(through-silicon-via)":[1],"count":[2,47,102,128,151],"minimization":[3],"is":[4],"one":[5],"of":[6,33,53,67,133],"the":[7,12,28,31,51,65,91,111,116,126,131],"most":[8],"important":[9],"objectives":[10],"in":[11,25],"three-dimensional":[13],"integrated":[14],"circuit":[15],"(3D":[16],"IC)":[17],"design.":[18],"In":[19],"this":[20],"paper,":[21],"we":[22,79],"demonstrate":[23],"that,":[24],"addition":[26],"to":[27,50,57,64,87,124],"layer":[29,39,98],"assignment,":[30],"selection":[32,96,132],"wafer":[34,69,93,134],"bonding":[35,70,94,135],"type":[36,71,95,136],"for":[37,72,100,137],"each":[38,73,138],"also":[40],"has":[41,61],"a":[42],"great":[43],"impact":[44],"on":[45,76],"minimization.":[48,103],"However,":[49],"best":[52],"our":[54,106,144],"knowledge,":[55],"up":[56,90],"now,":[58],"no":[59],"attention":[60],"been":[62],"paid":[63],"problem":[66],"selecting":[68],"layer.":[74],"Based":[75],"that":[77,105,121,143],"observation,":[78],"propose":[80],"an":[81],"integer":[82],"linear":[83],"programming":[84],"(ILP)":[85],"approach":[86,108,120,145],"formally":[88],"draw":[89],"simultaneous":[92],"and":[97],"assignment":[99],"Note":[104],"ILP":[107,123],"guarantees":[109],"obtaining":[110],"optimal":[112],"solution.":[113],"Compared":[114],"with":[115],"previous":[117],"high-level":[118],"synthesis":[119],"uses":[122],"minimize":[125],"(without":[129],"considering":[130],"layer),":[139],"experimental":[140],"results":[141],"show":[142],"can":[146],"further":[147],"reduce":[148],"56.97%":[149],"without":[152],"any":[153],"area":[154],"overhead.":[155]},"counts_by_year":[],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
