{"id":"https://openalex.org/W2072168214","doi":"https://doi.org/10.1109/apccas.2012.6419025","title":"Multiple-output neuron MOS current mirror with bias circuit suitable for Digital-to-Analog converter","display_name":"Multiple-output neuron MOS current mirror with bias circuit suitable for Digital-to-Analog converter","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W2072168214","doi":"https://doi.org/10.1109/apccas.2012.6419025","mag":"2072168214"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2012.6419025","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6419025","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5005177820","display_name":"Satoshi Matsumoto","orcid":"https://orcid.org/0000-0003-4836-7170"},"institutions":[{"id":"https://openalex.org/I177136067","display_name":"Saga University","ror":"https://ror.org/04f4wg107","country_code":"JP","type":"education","lineage":["https://openalex.org/I177136067"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Satoshi Matsumoto","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Saga University, Saga, Saga, Japan","Department of Electrical and Electronic Engineering, Saga University, Honjou-mati 1, Saga-shi, 840-8502 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Saga University, Saga, Saga, Japan","institution_ids":["https://openalex.org/I177136067"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Saga University, Honjou-mati 1, Saga-shi, 840-8502 Japan","institution_ids":["https://openalex.org/I177136067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114086662","display_name":"Sumio Fukai","orcid":null},"institutions":[{"id":"https://openalex.org/I177136067","display_name":"Saga University","ror":"https://ror.org/04f4wg107","country_code":"JP","type":"education","lineage":["https://openalex.org/I177136067"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Sumio Fukai","raw_affiliation_strings":["Department of Electrical and Electronic Engineering, Saga University, Saga, Saga, Japan","Department of Electrical and Electronic Engineering, Saga University, Honjou-mati 1, Saga-shi, 840-8502 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Saga University, Saga, Saga, Japan","institution_ids":["https://openalex.org/I177136067"]},{"raw_affiliation_string":"Department of Electrical and Electronic Engineering, Saga University, Honjou-mati 1, Saga-shi, 840-8502 Japan","institution_ids":["https://openalex.org/I177136067"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5055990696","display_name":"Akio Shimizu","orcid":"https://orcid.org/0000-0002-0672-2042"},"institutions":[{"id":"https://openalex.org/I3017972175","display_name":"National Institute of Technology, Ariake College","ror":"https://ror.org/004np3m61","country_code":"JP","type":"education","lineage":["https://openalex.org/I3017972175","https://openalex.org/I4210120810"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Akio Shimizu","raw_affiliation_strings":["Department of Electrical and Information Engineering, Ariake National College of Technology, Omuta, Japan","Department of Electrical and Information Engineering, Ariake Naitional College of Technology, Higashihagio-mati 150, Omuta-shi, 836-8585 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Information Engineering, Ariake National College of Technology, Omuta, Japan","institution_ids":["https://openalex.org/I3017972175"]},{"raw_affiliation_string":"Department of Electrical and Information Engineering, Ariake Naitional College of Technology, Higashihagio-mati 150, Omuta-shi, 836-8585 Japan","institution_ids":["https://openalex.org/I3017972175"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5103399515","display_name":"Yohei Ishikawa","orcid":null},"institutions":[{"id":"https://openalex.org/I3017972175","display_name":"National Institute of Technology, Ariake College","ror":"https://ror.org/004np3m61","country_code":"JP","type":"education","lineage":["https://openalex.org/I3017972175","https://openalex.org/I4210120810"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Yohei Ishikawa","raw_affiliation_strings":["Department of Electrical and Information Engineering, Ariake National College of Technology, Omuta, Japan","Department of Electrical and Information Engineering, Ariake Naitional College of Technology, Higashihagio-mati 150, Omuta-shi, 836-8585 Japan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Information Engineering, Ariake National College of Technology, Omuta, Japan","institution_ids":["https://openalex.org/I3017972175"]},{"raw_affiliation_string":"Department of Electrical and Information Engineering, Ariake Naitional College of Technology, Higashihagio-mati 150, Omuta-shi, 836-8585 Japan","institution_ids":["https://openalex.org/I3017972175"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5005177820"],"corresponding_institution_ids":["https://openalex.org/I177136067"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.12964693,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"e87 c","issue":null,"first_page":"276","last_page":"279"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9977999925613403,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/current-mirror","display_name":"Current mirror","score":0.852486789226532},{"id":"https://openalex.org/keywords/biasing","display_name":"Biasing","score":0.6443287134170532},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5946691632270813},{"id":"https://openalex.org/keywords/mosfet","display_name":"MOSFET","score":0.5313535332679749},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.4669056534767151},{"id":"https://openalex.org/keywords/discrete-circuit","display_name":"Discrete circuit","score":0.44707977771759033},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4369620084762573},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.41120046377182007},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.38958507776260376},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3318351209163666},{"id":"https://openalex.org/keywords/short-circuit","display_name":"Short circuit","score":0.25135743618011475},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.20586812496185303},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16268378496170044}],"concepts":[{"id":"https://openalex.org/C173966970","wikidata":"https://www.wikidata.org/wiki/Q786012","display_name":"Current mirror","level":4,"score":0.852486789226532},{"id":"https://openalex.org/C20254490","wikidata":"https://www.wikidata.org/wiki/Q719550","display_name":"Biasing","level":3,"score":0.6443287134170532},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5946691632270813},{"id":"https://openalex.org/C2778413303","wikidata":"https://www.wikidata.org/wiki/Q210793","display_name":"MOSFET","level":4,"score":0.5313535332679749},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.4669056534767151},{"id":"https://openalex.org/C188058453","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Discrete circuit","level":4,"score":0.44707977771759033},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4369620084762573},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.41120046377182007},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.38958507776260376},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3318351209163666},{"id":"https://openalex.org/C68583231","wikidata":"https://www.wikidata.org/wiki/Q206907","display_name":"Short circuit","level":3,"score":0.25135743618011475},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.20586812496185303},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16268378496170044}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2012.6419025","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6419025","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8100000023841858,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":9,"referenced_works":["https://openalex.org/W1561050426","https://openalex.org/W1942678873","https://openalex.org/W2008047718","https://openalex.org/W2098418255","https://openalex.org/W2106241083","https://openalex.org/W2160142098","https://openalex.org/W2197902893","https://openalex.org/W6633660199","https://openalex.org/W6640517861"],"related_works":["https://openalex.org/W2160122484","https://openalex.org/W2184860653","https://openalex.org/W2167134364","https://openalex.org/W1992627288","https://openalex.org/W2217307244","https://openalex.org/W2124484215","https://openalex.org/W2111968304","https://openalex.org/W1923914176","https://openalex.org/W2505584970","https://openalex.org/W1942678873"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3,14,28,31],"multiple-output":[4,45,61],"neuron":[5,32,46,62],"MOS":[6,47,63],"current":[7,48,64,102],"mirror":[8,49,65],"with":[9,50,80],"bias":[10,36,51,67],"circuit":[11,37,52,74,92],"suitable":[12],"for":[13,40],"14-bit":[15],"current-steering":[16],"D/A":[17,22],"converter.":[18],"Area":[19],"of":[20,30,71],"the":[21,42,54,60,72,90,101],"converter":[23],"is":[24,38,75,105],"decreased":[25],"by":[26,77],"sharing":[27,41],"floating-gate":[29],"MOSFET.":[33],"A":[34],"novel":[35],"needed":[39],"floating-gate.":[43],"The":[44,69],"reduces":[53],"total":[55],"gate":[56],"area":[57],"to":[58],"1/811":[59],"without":[66],"circuit.":[68],"performance":[70],"proposed":[73,91],"evaluated":[76],"HSPICE":[78],"simulation":[79],"On-Semiconductor":[81],"1.2\u03bcm":[82],"CMOS":[83],"device":[84],"parameters.":[85],"Simulation":[86],"results":[87],"show":[88],"that":[89],"realizes":[93],"saturation":[94],"region":[95],"in":[96],"V":[97],"out":[98],">;":[99],"0.2[V],":[100],"copy":[103],"accuracy":[104],"99.99863%.":[106]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}