{"id":"https://openalex.org/W2080601662","doi":"https://doi.org/10.1109/apccas.2012.6419024","title":"A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion","display_name":"A compact 16-bit dual-slope integrating circuit for direct analog-to-residue conversion","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W2080601662","doi":"https://doi.org/10.1109/apccas.2012.6419024","mag":"2080601662"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2012.6419024","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6419024","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5102175018","display_name":"Howard Tang","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Howard Tang","raw_affiliation_strings":["VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019413100","display_name":"Joshua Yung Lih Low","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Joshua Yung Lih Low","raw_affiliation_strings":["VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035102341","display_name":"Jeremy Yung Shern Low","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Jeremy Yung Shern Low","raw_affiliation_strings":["VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5062730461","display_name":"Liter Siek","orcid":"https://orcid.org/0000-0002-0415-6497"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Liter Siek","raw_affiliation_strings":["VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5018516888","display_name":"Ching Chuen Jong","orcid":"https://orcid.org/0000-0003-1178-9062"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Ching Chuen Jong","raw_affiliation_strings":["VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5029335324","display_name":"Chip-Hong Chang","orcid":"https://orcid.org/0000-0002-8897-6176"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Chip-Hong Chang","raw_affiliation_strings":["VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"VIRTUS IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"VIRTUS, IC Design Centre of Excellence, School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.21459227,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"272","last_page":"275"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9976999759674072,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9968000054359436,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modulo","display_name":"Modulo","score":0.6770519018173218},{"id":"https://openalex.org/keywords/residue","display_name":"Residue (chemistry)","score":0.5915762186050415},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4884587824344635},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4353458285331726},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.3327968418598175},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.2585170269012451},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.25640881061553955},{"id":"https://openalex.org/keywords/discrete-mathematics","display_name":"Discrete mathematics","score":0.20201009511947632},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.17257362604141235},{"id":"https://openalex.org/keywords/chemistry","display_name":"Chemistry","score":0.11428025364875793}],"concepts":[{"id":"https://openalex.org/C54732982","wikidata":"https://www.wikidata.org/wiki/Q1415345","display_name":"Modulo","level":2,"score":0.6770519018173218},{"id":"https://openalex.org/C2781338088","wikidata":"https://www.wikidata.org/wiki/Q903495","display_name":"Residue (chemistry)","level":2,"score":0.5915762186050415},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4884587824344635},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4353458285331726},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.3327968418598175},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.2585170269012451},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.25640881061553955},{"id":"https://openalex.org/C118615104","wikidata":"https://www.wikidata.org/wiki/Q121416","display_name":"Discrete mathematics","level":1,"score":0.20201009511947632},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.17257362604141235},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.11428025364875793},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/apccas.2012.6419024","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6419024","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:dr.ntu.edu.sg:10356/101457","is_oa":false,"landing_page_url":"https://hdl.handle.net/10356/101457","pdf_url":null,"source":{"id":"https://openalex.org/S4306402609","display_name":"DR-NTU (Nanyang Technological University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I172675005","host_organization_name":"Nanyang Technological University","host_organization_lineage":["https://openalex.org/I172675005"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference Paper"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W1966490880","https://openalex.org/W1974330781","https://openalex.org/W1997361420","https://openalex.org/W1998284495","https://openalex.org/W2099753344","https://openalex.org/W2100335494","https://openalex.org/W2120774737","https://openalex.org/W2124851015","https://openalex.org/W2126360616","https://openalex.org/W2126370034","https://openalex.org/W2533341089","https://openalex.org/W2545238695","https://openalex.org/W6729094849"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2117548279","https://openalex.org/W2070252991","https://openalex.org/W2807449856","https://openalex.org/W2941201715","https://openalex.org/W2025727968","https://openalex.org/W238211858","https://openalex.org/W2803761277","https://openalex.org/W4297742300","https://openalex.org/W2195798288"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3,10,19,75],"new":[4],"16-bit":[5],"analog-to-residue":[6],"converter":[7],"(ARC)":[8],"for":[9],"three":[11,41],"moduli":[12],"set":[13],"{26-1,":[14],"26,":[15],"26+1}":[16],"RNS":[17,76],"with":[18,39,64],"dynamic":[20],"range":[21],"of":[22,60,70],"18":[23],"bits.":[24],"Based":[25],"on":[26],"dual-slope":[27],"integrating":[28,72],"principle,":[29],"direct":[30],"conversion":[31],"from":[32],"analog":[33],"to":[34],"residue":[35],"representation":[36],"is":[37],"achieved":[38],"only":[40],"modulo":[42],"counters":[43],"after":[44],"the":[45,51,55,65],"voltage":[46],"sensing":[47],"circuits.":[48],"By":[49],"eliminating":[50],"costly":[52],"binary-to-residue":[53],"converter,":[54],"proposed":[56],"ARC":[57],"saves":[58],"81.6%":[59],"area":[61],"in":[62],"comparison":[63],"conventional":[66],"two-stage":[67],"architecture":[68],"consisting":[69],"an":[71],"ADC":[73],"and":[74],"forward":[77],"converter.":[78]},"counts_by_year":[{"year":2016,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}