{"id":"https://openalex.org/W1979973560","doi":"https://doi.org/10.1109/apccas.2012.6418987","title":"2PCDAL: Two-phase clocking dual-rail adiabatic logic","display_name":"2PCDAL: Two-phase clocking dual-rail adiabatic logic","publication_year":2012,"publication_date":"2012-12-01","ids":{"openalex":"https://openalex.org/W1979973560","doi":"https://doi.org/10.1109/apccas.2012.6418987","mag":"1979973560"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2012.6418987","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6418987","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5043735152","display_name":"Yasuhiro Takahashi","orcid":"https://orcid.org/0000-0002-1653-8425"},"institutions":[{"id":"https://openalex.org/I42405503","display_name":"Gifu University","ror":"https://ror.org/024exxj48","country_code":"JP","type":"education","lineage":["https://openalex.org/I42405503"]}],"countries":["JP"],"is_corresponding":true,"raw_author_name":"Yasuhiro Takahashi","raw_affiliation_strings":["Graduate School of Engineering, Gifu University, Gifu, Japan","Graduate School of Engineering, Gifu University, Japan,1-1 Yanagido, Gifu-shi,501-1193"],"affiliations":[{"raw_affiliation_string":"Graduate School of Engineering, Gifu University, Gifu, Japan","institution_ids":["https://openalex.org/I42405503"]},{"raw_affiliation_string":"Graduate School of Engineering, Gifu University, Japan,1-1 Yanagido, Gifu-shi,501-1193","institution_ids":["https://openalex.org/I42405503"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5020308301","display_name":"Zhongyu Luo","orcid":null},"institutions":[{"id":"https://openalex.org/I42405503","display_name":"Gifu University","ror":"https://ror.org/024exxj48","country_code":"JP","type":"education","lineage":["https://openalex.org/I42405503"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Zhongyu Luo","raw_affiliation_strings":["Graduate School of Engineering, Gifu University, Gifu, Japan","Graduate School of Engineering, Gifu University, Japan,1-1 Yanagido, Gifu-shi,501-1193"],"affiliations":[{"raw_affiliation_string":"Graduate School of Engineering, Gifu University, Gifu, Japan","institution_ids":["https://openalex.org/I42405503"]},{"raw_affiliation_string":"Graduate School of Engineering, Gifu University, Japan,1-1 Yanagido, Gifu-shi,501-1193","institution_ids":["https://openalex.org/I42405503"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108512806","display_name":"Toshikazu Sekine","orcid":null},"institutions":[{"id":"https://openalex.org/I42405503","display_name":"Gifu University","ror":"https://ror.org/024exxj48","country_code":"JP","type":"education","lineage":["https://openalex.org/I42405503"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Toshikazu Sekine","raw_affiliation_strings":["Graduate School of Engineering, Gifu University, Gifu, Japan","Graduate School of Engineering, Gifu University, Japan,1-1 Yanagido, Gifu-shi,501-1193"],"affiliations":[{"raw_affiliation_string":"Graduate School of Engineering, Gifu University, Gifu, Japan","institution_ids":["https://openalex.org/I42405503"]},{"raw_affiliation_string":"Graduate School of Engineering, Gifu University, Japan,1-1 Yanagido, Gifu-shi,501-1193","institution_ids":["https://openalex.org/I42405503"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067973102","display_name":"Nazrul Anuar Nayan","orcid":"https://orcid.org/0000-0001-6657-2982"},"institutions":[{"id":"https://openalex.org/I885383172","display_name":"National University of Malaysia","ror":"https://ror.org/00bw8d226","country_code":"MY","type":"education","lineage":["https://openalex.org/I885383172"]},{"id":"https://openalex.org/I4210114742","display_name":"National Institutes of Biotechnology Malaysia","ror":"https://ror.org/029dygd35","country_code":"MY","type":"government","lineage":["https://openalex.org/I134138859","https://openalex.org/I4210114742"]}],"countries":["MY"],"is_corresponding":false,"raw_author_name":"Nazrul Anuar Nayan","raw_affiliation_strings":["Department of Electrical, Electronic and Systems Engineering, National University of Malaysia, Bangi, Selangor, Malaysia","Department of Electrical, Electronic and Systems Engineering, National University of Malaysia, 43600 UKM Bangi, Selangor, Malaysia"],"affiliations":[{"raw_affiliation_string":"Department of Electrical, Electronic and Systems Engineering, National University of Malaysia, Bangi, Selangor, Malaysia","institution_ids":["https://openalex.org/I4210114742","https://openalex.org/I885383172"]},{"raw_affiliation_string":"Department of Electrical, Electronic and Systems Engineering, National University of Malaysia, 43600 UKM Bangi, Selangor, Malaysia","institution_ids":["https://openalex.org/I4210114742","https://openalex.org/I885383172"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5074850118","display_name":"M. YOKOYAMA","orcid":"https://orcid.org/0000-0003-2837-6272"},"institutions":[{"id":"https://openalex.org/I112524849","display_name":"Yamagata University","ror":"https://ror.org/00xy44n04","country_code":"JP","type":"education","lineage":["https://openalex.org/I112524849"]}],"countries":["JP"],"is_corresponding":false,"raw_author_name":"Michio Yokoyama","raw_affiliation_strings":["Graduate School of Science and Engineering, Yamagata University, Yonezawa, Japan","Graduate School of Science and Engineering, Yamagata University, Japan, 4-3-16 Jonan, Yonezawa-shi, 992-8510"],"affiliations":[{"raw_affiliation_string":"Graduate School of Science and Engineering, Yamagata University, Yonezawa, Japan","institution_ids":["https://openalex.org/I112524849"]},{"raw_affiliation_string":"Graduate School of Science and Engineering, Yamagata University, Japan, 4-3-16 Jonan, Yonezawa-shi, 992-8510","institution_ids":["https://openalex.org/I112524849"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5043735152"],"corresponding_institution_ids":["https://openalex.org/I42405503"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.05561483,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"124","last_page":"127"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10382","display_name":"Quantum and electron transport phenomena","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9975000023841858,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adiabatic-process","display_name":"Adiabatic process","score":0.8353250026702881},{"id":"https://openalex.org/keywords/adiabatic-circuit","display_name":"Adiabatic circuit","score":0.7518795132637024},{"id":"https://openalex.org/keywords/dual","display_name":"Dual (grammatical number)","score":0.6479370594024658},{"id":"https://openalex.org/keywords/inverter","display_name":"Inverter","score":0.5902414321899414},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5465238094329834},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5278672575950623},{"id":"https://openalex.org/keywords/sequential-logic","display_name":"Sequential logic","score":0.49761727452278137},{"id":"https://openalex.org/keywords/logic-level","display_name":"Logic level","score":0.4961417615413666},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.47070786356925964},{"id":"https://openalex.org/keywords/range","display_name":"Range (aeronautics)","score":0.45973220467567444},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.4473664462566376},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4073488414287567},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.31502825021743774},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2973432242870331},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2673306465148926},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1894814372062683},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.17931067943572998},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1569257378578186},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.1213480532169342},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.09480908513069153},{"id":"https://openalex.org/keywords/quantum-mechanics","display_name":"Quantum mechanics","score":0.07215425372123718}],"concepts":[{"id":"https://openalex.org/C109663097","wikidata":"https://www.wikidata.org/wiki/Q182453","display_name":"Adiabatic process","level":2,"score":0.8353250026702881},{"id":"https://openalex.org/C87606752","wikidata":"https://www.wikidata.org/wiki/Q4682637","display_name":"Adiabatic circuit","level":5,"score":0.7518795132637024},{"id":"https://openalex.org/C2780980858","wikidata":"https://www.wikidata.org/wiki/Q110022","display_name":"Dual (grammatical number)","level":2,"score":0.6479370594024658},{"id":"https://openalex.org/C11190779","wikidata":"https://www.wikidata.org/wiki/Q664575","display_name":"Inverter","level":3,"score":0.5902414321899414},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5465238094329834},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5278672575950623},{"id":"https://openalex.org/C187075797","wikidata":"https://www.wikidata.org/wiki/Q173245","display_name":"Sequential logic","level":3,"score":0.49761727452278137},{"id":"https://openalex.org/C146569638","wikidata":"https://www.wikidata.org/wiki/Q173378","display_name":"Logic level","level":3,"score":0.4961417615413666},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.47070786356925964},{"id":"https://openalex.org/C204323151","wikidata":"https://www.wikidata.org/wiki/Q905424","display_name":"Range (aeronautics)","level":2,"score":0.45973220467567444},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.4473664462566376},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4073488414287567},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.31502825021743774},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2973432242870331},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2673306465148926},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1894814372062683},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.17931067943572998},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1569257378578186},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.1213480532169342},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.09480908513069153},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.07215425372123718},{"id":"https://openalex.org/C124952713","wikidata":"https://www.wikidata.org/wiki/Q8242","display_name":"Literature","level":1,"score":0.0},{"id":"https://openalex.org/C142362112","wikidata":"https://www.wikidata.org/wiki/Q735","display_name":"Art","level":0,"score":0.0},{"id":"https://openalex.org/C146978453","wikidata":"https://www.wikidata.org/wiki/Q3798668","display_name":"Aerospace engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2012.6418987","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2012.6418987","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2012 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":11,"referenced_works":["https://openalex.org/W1988527350","https://openalex.org/W2041255146","https://openalex.org/W2053422044","https://openalex.org/W2085952730","https://openalex.org/W2105946429","https://openalex.org/W2122984966","https://openalex.org/W2123607016","https://openalex.org/W2129878502","https://openalex.org/W2150363350","https://openalex.org/W2170191597","https://openalex.org/W2537345777"],"related_works":["https://openalex.org/W2580743037","https://openalex.org/W2965791759","https://openalex.org/W2894573466","https://openalex.org/W2089292011","https://openalex.org/W2554253794","https://openalex.org/W1889611132","https://openalex.org/W3080459857","https://openalex.org/W2108907112","https://openalex.org/W2166506797","https://openalex.org/W2126241630"],"abstract_inverted_index":{"This":[0],"paper":[1],"presents":[2],"a":[3],"new":[4],"dual-rail":[5,44,78],"adiabatic":[6,79],"logic":[7,29,46],"which":[8,21],"called":[9],"2PCDAL.":[10],"Our":[11],"proposed":[12,28,39,66],"circuit":[13],"is":[14,22,69],"based":[15],"on":[16],"2N2N2P":[17,20],"structure.":[18],"Unlike":[19],"driven":[23],"by":[24],"four-phase":[25],"clocking,":[26],"the":[27,38,42,61,65,71,76,87],"only":[30],"needs":[31],"two-phase":[32],"clocking":[33],"to":[34,93],"operate.":[35],"Compared":[36],"with":[37],"2PCDAL":[40,67],"and":[41,56,84],"other":[43,77],"quasi-adiabatic":[45],"families":[47],"of":[48,64,75,89],"cell":[49],"design,":[50],"namely,":[51],"2N2N2P,":[52,82],"CAL,":[53],"ECRL,":[54,83],"PAL,":[55],"PFAL,":[57],"we":[58],"show":[59],"that":[60],"energy":[62],"consumption":[63],"inverter":[68],"almost":[70],"same":[72],"as":[73],"those":[74],"logics":[80],"(i.e.":[81],"PFAL)":[85],"in":[86],"range":[88],"from":[90],"10":[91,94],"kHz":[92],"MHz.":[95]},"counts_by_year":[{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
