{"id":"https://openalex.org/W2171145168","doi":"https://doi.org/10.1109/apccas.2010.5775085","title":"Asynchronous multi-channel ADC and DSP processor interface","display_name":"Asynchronous multi-channel ADC and DSP processor interface","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2171145168","doi":"https://doi.org/10.1109/apccas.2010.5775085","mag":"2171145168"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5775085","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5775085","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5025771279","display_name":"Nennie Farina Mahat","orcid":null},"institutions":[{"id":"https://openalex.org/I891303086","display_name":"MIMOS (Malaysia)","ror":"https://ror.org/01k94e681","country_code":"MY","type":"company","lineage":["https://openalex.org/I891303086"]}],"countries":["MY"],"is_corresponding":true,"raw_author_name":"Nennie Farina Mahat","raw_affiliation_strings":["Microelectronics Department, MIMOS Berhad, Kuala Lumpur, Malaysia"],"affiliations":[{"raw_affiliation_string":"Microelectronics Department, MIMOS Berhad, Kuala Lumpur, Malaysia","institution_ids":["https://openalex.org/I891303086"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5021461302","display_name":"Lam Kien Sieng","orcid":null},"institutions":[{"id":"https://openalex.org/I891303086","display_name":"MIMOS (Malaysia)","ror":"https://ror.org/01k94e681","country_code":"MY","type":"company","lineage":["https://openalex.org/I891303086"]}],"countries":["MY"],"is_corresponding":false,"raw_author_name":"Lam Kien Sieng","raw_affiliation_strings":["Microelectronics Department, MIMOS Berhad, Kuala Lumpur, Malaysia"],"affiliations":[{"raw_affiliation_string":"Microelectronics Department, MIMOS Berhad, Kuala Lumpur, Malaysia","institution_ids":["https://openalex.org/I891303086"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073828777","display_name":"Muhamad Khairol Ab Rani","orcid":null},"institutions":[{"id":"https://openalex.org/I891303086","display_name":"MIMOS (Malaysia)","ror":"https://ror.org/01k94e681","country_code":"MY","type":"company","lineage":["https://openalex.org/I891303086"]}],"countries":["MY"],"is_corresponding":false,"raw_author_name":"Muhamad Khairol Ab Rani","raw_affiliation_strings":["Microelectronics Department, MIMOS Berhad, Kuala Lumpur, Malaysia"],"affiliations":[{"raw_affiliation_string":"Microelectronics Department, MIMOS Berhad, Kuala Lumpur, Malaysia","institution_ids":["https://openalex.org/I891303086"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5025771279"],"corresponding_institution_ids":["https://openalex.org/I891303086"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.1823032,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"716","last_page":"719"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9955999851226807,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.995199978351593,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7496855854988098},{"id":"https://openalex.org/keywords/interfacing","display_name":"Interfacing","score":0.7435673475265503},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.7323578596115112},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.6996908187866211},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.6155390739440918},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.6147714853286743},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5497770309448242},{"id":"https://openalex.org/keywords/digital-signal-processor","display_name":"Digital signal processor","score":0.5121359825134277},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5023794174194336},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.4731387197971344},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.3529887795448303},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.09057021141052246}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7496855854988098},{"id":"https://openalex.org/C2776303644","wikidata":"https://www.wikidata.org/wiki/Q1020499","display_name":"Interfacing","level":2,"score":0.7435673475265503},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.7323578596115112},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.6996908187866211},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.6155390739440918},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.6147714853286743},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5497770309448242},{"id":"https://openalex.org/C161611012","wikidata":"https://www.wikidata.org/wiki/Q106370","display_name":"Digital signal processor","level":3,"score":0.5121359825134277},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5023794174194336},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.4731387197971344},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.3529887795448303},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.09057021141052246},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5775085","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5775085","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8500000238418579}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":10,"referenced_works":["https://openalex.org/W1788265461","https://openalex.org/W1946142907","https://openalex.org/W2141112086","https://openalex.org/W2154302820","https://openalex.org/W2165660335","https://openalex.org/W2534322062","https://openalex.org/W2543155925","https://openalex.org/W3209970425","https://openalex.org/W6638085601","https://openalex.org/W6640707608"],"related_works":["https://openalex.org/W2319687164","https://openalex.org/W1556297113","https://openalex.org/W2572037897","https://openalex.org/W2077289773","https://openalex.org/W2352569066","https://openalex.org/W2532375706","https://openalex.org/W4239668215","https://openalex.org/W2379636925","https://openalex.org/W2390600871","https://openalex.org/W1927072911"],"abstract_inverted_index":{"System-on-chip":[0],"technology":[1],"requires":[2],"smooth":[3],"interfacing":[4],"between":[5,43,126],"its":[6],"various":[7],"peripherals":[8],"and":[9,17,47,74,132],"processors.":[10],"Multi-channel":[11],"Analog-to-Digital":[12],"Converter":[13],"with":[14,33,100],"high":[15,48],"speed":[16,49],"serial":[18],"interface":[19,30,41,86,96,131],"even":[20],"raises":[21],"more":[22],"challenges":[23],"to":[24,29,87,92,105,122],"the":[25,31,40,81,85,117,120,124,127,129,133],"designer":[26],"in":[27],"order":[28],"ADC":[32,46,91,130],"processor.":[34,94,135],"In":[35],"this":[36],"paper,":[37],"we":[38],"present":[39],"design":[42,83,121],"a":[44],"multi-channel":[45],"DSP":[50,93,134],"processor":[51],"for":[52,65],"system-on-chip":[53],"design.":[54],"The":[55,95],"Analog":[56],"Devices'":[57],"AD9219":[58],"is":[59,63],"selected":[60],"because":[61],"it":[62],"designed":[64],"low":[66,68],"cost,":[67],"power":[69],"consumption,":[70],"small":[71],"area":[72],"size":[73],"ease":[75],"of":[76,84,119],"use.":[77],"We":[78,114],"have":[79,115],"implemented":[80],"VSLI":[82],"pass":[88],"data":[89],"from":[90,110],"uses":[97],"asynchronous":[98],"FIFOs":[99],"Gray":[101],"code":[102],"synchronization":[103,107],"technique":[104],"handle":[106],"issue":[108],"created":[109],"two":[111],"clock":[112],"domains.":[113],"explained":[116],"application":[118],"show":[123],"connectivity":[125],"ADC,":[128]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}