{"id":"https://openalex.org/W2165215843","doi":"https://doi.org/10.1109/apccas.2010.5775020","title":"An efficient ODT calibration scheme for improved signal integrity in memory interface","display_name":"An efficient ODT calibration scheme for improved signal integrity in memory interface","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2165215843","doi":"https://doi.org/10.1109/apccas.2010.5775020","mag":"2165215843"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5775020","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5775020","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5037391030","display_name":"Gudipati Kalyan","orcid":null},"institutions":[{"id":"https://openalex.org/I65181880","display_name":"Indian Institute of Technology Hyderabad","ror":"https://ror.org/01j4v3x97","country_code":"IN","type":"education","lineage":["https://openalex.org/I65181880"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Gudipati Kalyan","raw_affiliation_strings":["Centre of VLSI and Embedded system, IIIT-Hyderabad, Hyderabad, India"],"affiliations":[{"raw_affiliation_string":"Centre of VLSI and Embedded system, IIIT-Hyderabad, Hyderabad, India","institution_ids":["https://openalex.org/I65181880"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5079825929","display_name":"M. B. Srinivas","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"M.B. Srinivas","raw_affiliation_strings":["Electronics and Communication Engineering, Birla Institute of Technology and Science, Hyderabad, India"],"affiliations":[{"raw_affiliation_string":"Electronics and Communication Engineering, Birla Institute of Technology and Science, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5037391030"],"corresponding_institution_ids":["https://openalex.org/I65181880"],"apc_list":null,"apc_paid":null,"fwci":0.5773,"has_fulltext":false,"cited_by_count":7,"citation_normalized_percentile":{"value":0.738489,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":"38","issue":null,"first_page":"1211","last_page":"1214"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11429","display_name":"Semiconductor Lasers and Optical Devices","score":0.996399998664856,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9962000250816345,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9883000254631042,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6944140195846558},{"id":"https://openalex.org/keywords/interface","display_name":"Interface (matter)","score":0.6274234652519226},{"id":"https://openalex.org/keywords/calibration","display_name":"Calibration","score":0.6178826093673706},{"id":"https://openalex.org/keywords/signal","display_name":"SIGNAL (programming language)","score":0.6054919958114624},{"id":"https://openalex.org/keywords/scheme","display_name":"Scheme (mathematics)","score":0.5691418647766113},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.5612518787384033},{"id":"https://openalex.org/keywords/linearity","display_name":"Linearity","score":0.5470550656318665},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5051680207252502},{"id":"https://openalex.org/keywords/electrical-impedance","display_name":"Electrical impedance","score":0.48051509261131287},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4705137610435486},{"id":"https://openalex.org/keywords/window","display_name":"Window (computing)","score":0.4289604723453522},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.35090821981430054},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.32921040058135986},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3201434314250946},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22640478610992432},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.15676996111869812},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.10086482763290405},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09237629175186157}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6944140195846558},{"id":"https://openalex.org/C113843644","wikidata":"https://www.wikidata.org/wiki/Q901882","display_name":"Interface (matter)","level":4,"score":0.6274234652519226},{"id":"https://openalex.org/C165838908","wikidata":"https://www.wikidata.org/wiki/Q736777","display_name":"Calibration","level":2,"score":0.6178826093673706},{"id":"https://openalex.org/C2779843651","wikidata":"https://www.wikidata.org/wiki/Q7390335","display_name":"SIGNAL (programming language)","level":2,"score":0.6054919958114624},{"id":"https://openalex.org/C77618280","wikidata":"https://www.wikidata.org/wiki/Q1155772","display_name":"Scheme (mathematics)","level":2,"score":0.5691418647766113},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.5612518787384033},{"id":"https://openalex.org/C77170095","wikidata":"https://www.wikidata.org/wiki/Q1753188","display_name":"Linearity","level":2,"score":0.5470550656318665},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5051680207252502},{"id":"https://openalex.org/C17829176","wikidata":"https://www.wikidata.org/wiki/Q179043","display_name":"Electrical impedance","level":2,"score":0.48051509261131287},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4705137610435486},{"id":"https://openalex.org/C2778751112","wikidata":"https://www.wikidata.org/wiki/Q835016","display_name":"Window (computing)","level":2,"score":0.4289604723453522},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.35090821981430054},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.32921040058135986},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3201434314250946},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22640478610992432},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.15676996111869812},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.10086482763290405},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09237629175186157},{"id":"https://openalex.org/C157915830","wikidata":"https://www.wikidata.org/wiki/Q2928001","display_name":"Bubble","level":2,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C129307140","wikidata":"https://www.wikidata.org/wiki/Q6795880","display_name":"Maximum bubble pressure method","level":3,"score":0.0},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5775020","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5775020","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8199999928474426}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W1546460110","https://openalex.org/W2095008732","https://openalex.org/W2171575994","https://openalex.org/W6632657969","https://openalex.org/W6674060004","https://openalex.org/W6685378472"],"related_works":["https://openalex.org/W2289987414","https://openalex.org/W2386114299","https://openalex.org/W2766876417","https://openalex.org/W2347291799","https://openalex.org/W2023858428","https://openalex.org/W2109115373","https://openalex.org/W2390901981","https://openalex.org/W2350165513","https://openalex.org/W2126963364","https://openalex.org/W2111457822"],"abstract_inverted_index":{"An":[0],"Input":[1],"Output":[2],"(IO)":[3],"Buffer":[4],"for":[5,46],"memory":[6],"Interface":[7],"is":[8,34],"proposed":[9,35],"with":[10,26],"the":[11,21,24,61],"concept":[12],"of":[13,23,55],"a":[14,27,52],"merged":[15],"driver":[16,25,40],"which":[17,36,58],"helps":[18],"in":[19,51],"improving":[20],"linearity":[22],"reduced":[28],"area.":[29],"A":[30],"novel":[31],"calibration":[32],"scheme":[33],"can":[37],"adjust":[38],"larger":[39],"resistance":[41],"and":[42,48],"termination":[43],"impedance":[44],"changes":[45],"temperature":[47],"voltage":[49],"drifts":[50],"fewer":[53],"cycles":[54],"system":[56],"clock":[57],"will":[59],"improve":[60],"valid":[62],"data":[63],"window.":[64]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2016,"cited_by_count":1},{"year":2015,"cited_by_count":1},{"year":2014,"cited_by_count":1},{"year":2012,"cited_by_count":2}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
