{"id":"https://openalex.org/W2147523449","doi":"https://doi.org/10.1109/apccas.2010.5774917","title":"Implementation of highly accurate NMOS Vt based clamping technique in low current comparator","display_name":"Implementation of highly accurate NMOS Vt based clamping technique in low current comparator","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2147523449","doi":"https://doi.org/10.1109/apccas.2010.5774917","mag":"2147523449"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5774917","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774917","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011261054","display_name":"Syed Mustafa Khelat Bari","orcid":"https://orcid.org/0000-0003-3374-0251"},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"Syed Mustafa Khelat Bari","raw_affiliation_strings":["Power IC Limited, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"Power IC Limited, Dhaka, Bangladesh","institution_ids":[]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071112109","display_name":"Didar Islam","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Didar Islam","raw_affiliation_strings":["Power IC Limited, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"Power IC Limited, Dhaka, Bangladesh","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5085443444","display_name":"Khondker Zakir Ahmed","orcid":"https://orcid.org/0000-0001-7247-4254"},"institutions":[{"id":"https://openalex.org/I885507782","display_name":"East West University","ror":"https://ror.org/05p0tzt32","country_code":"BD","type":"education","lineage":["https://openalex.org/I885507782"]}],"countries":["BD"],"is_corresponding":false,"raw_author_name":"Khondker Zakir Ahmed","raw_affiliation_strings":["Department of EEE, EAST WEST University, Dhaka, Bangladesh"],"affiliations":[{"raw_affiliation_string":"Department of EEE, EAST WEST University, Dhaka, Bangladesh","institution_ids":["https://openalex.org/I885507782"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5011261054"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17513541,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"sc 21","issue":null,"first_page":"592","last_page":"595"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/nmos-logic","display_name":"NMOS logic","score":0.9218877553939819},{"id":"https://openalex.org/keywords/clamping","display_name":"Clamping","score":0.8138681054115295},{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.8132553100585938},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5860424041748047},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5560370683670044},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5101318955421448},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5078669190406799},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.4940062165260315},{"id":"https://openalex.org/keywords/comparator-applications","display_name":"Comparator applications","score":0.4409271776676178},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.3201139569282532},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.19441485404968262},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.1552135944366455}],"concepts":[{"id":"https://openalex.org/C197162436","wikidata":"https://www.wikidata.org/wiki/Q83908","display_name":"NMOS logic","level":4,"score":0.9218877553939819},{"id":"https://openalex.org/C84111939","wikidata":"https://www.wikidata.org/wiki/Q5125465","display_name":"Clamping","level":2,"score":0.8138681054115295},{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.8132553100585938},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5860424041748047},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5560370683670044},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5101318955421448},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5078669190406799},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.4940062165260315},{"id":"https://openalex.org/C121649978","wikidata":"https://www.wikidata.org/wiki/Q17007408","display_name":"Comparator applications","level":4,"score":0.4409271776676178},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.3201139569282532},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.19441485404968262},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.1552135944366455},{"id":"https://openalex.org/C31972630","wikidata":"https://www.wikidata.org/wiki/Q844240","display_name":"Computer vision","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5774917","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774917","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/16","score":0.46000000834465027,"display_name":"Peace, Justice and strong institutions"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1536945048","https://openalex.org/W1566907904","https://openalex.org/W1566916904","https://openalex.org/W1991671563","https://openalex.org/W2110033475","https://openalex.org/W2147887812","https://openalex.org/W2169109199"],"related_works":["https://openalex.org/W2369252356","https://openalex.org/W2744219894","https://openalex.org/W3201763910","https://openalex.org/W2390518854","https://openalex.org/W2355921680","https://openalex.org/W2759985121","https://openalex.org/W3204293969","https://openalex.org/W1918959729","https://openalex.org/W1965786156","https://openalex.org/W3123985664"],"abstract_inverted_index":{"This":[0],"paper":[1,75],"presents":[2],"a":[3,7,30],"circuit":[4],"implementation":[5],"of":[6,45,66,89,92,128],"simple":[8],"but":[9],"accurate":[10,112],"NMOS":[11,78,91],"Vt":[12],"based":[13,80],"clamping":[14,58,81,113,134],"technique":[15,82],"to":[16,69,85],"decrease":[17],"the":[18,35,43,61,67,87,90,126,129,132,145],"logic":[19,37,94,107],"transition":[20,108],"delay":[21,38],"in":[22,96,136,144],"an":[23,76],"ultra":[24],"low":[25,32,102],"ground":[26],"current":[27,33],"comparator.":[28],"In":[29,73],"very":[31,111],"comparator":[34,130],"output":[36,93],"is":[39,64,83],"predominantly":[40],"set":[41],"by":[42,57],"speed":[44,106],"slew":[46],"limited":[47],"decision":[48,62],"making":[49],"nodes":[50],"and":[51,100,125],"hence":[52],"limiting":[53],"their":[54],"wide":[55],"swing":[56],"them":[59],"around":[60],"point":[63],"one":[65],"ways":[68],"reduce":[70],"that":[71],"delay.":[72],"this":[74],"innovative":[77],"threshold":[79,114],"proposed":[84,133],"clamp":[86],"gate":[88],"stage":[95],"both":[97],"going":[98,101],"high":[99,105],"which":[103],"ensures":[104],"along":[109],"with":[110,123,131],"without":[115],"using":[116],"too":[117],"much":[118],"bias":[119],"current.":[120],"Simulation":[121],"results":[122],"analysis":[124],"layout":[127],"network":[135],"0.5\u00b5m":[137],"CMOS":[138],"process":[139],"has":[140],"also":[141],"been":[142],"presented":[143],"paper.":[146]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
