{"id":"https://openalex.org/W2141594064","doi":"https://doi.org/10.1109/apccas.2010.5774895","title":"An all-digital de-skew clock generator for arbitrary wide range delay","display_name":"An all-digital de-skew clock generator for arbitrary wide range delay","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2141594064","doi":"https://doi.org/10.1109/apccas.2010.5774895","mag":"2141594064"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5774895","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774895","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5004379808","display_name":"Kevin Fong","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Kevin Fong","raw_affiliation_strings":["Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006060600","display_name":"Yu-Cheng Hung","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Yu-Cheng Hung","raw_affiliation_strings":["Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5072981734","display_name":"Zuow-Zun Chen","orcid":null},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Zuow-Zun Chen","raw_affiliation_strings":["Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617","institution_ids":["https://openalex.org/I16733864"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5060720784","display_name":"Tai\u2010Cheng Lee","orcid":"https://orcid.org/0000-0002-9639-5937"},"institutions":[{"id":"https://openalex.org/I16733864","display_name":"National Taiwan University","ror":"https://ror.org/05bqach95","country_code":"TW","type":"education","lineage":["https://openalex.org/I16733864"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Tai-Cheng Lee","raw_affiliation_strings":["Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617"],"affiliations":[{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, Taipei, Taiwan","institution_ids":["https://openalex.org/I16733864"]},{"raw_affiliation_string":"Graduate Institute of Electronics Engineering and Department of Electrical Engineering, National Taiwan University, National Taiwan University, Taipei, Taiwan, 10617","institution_ids":["https://openalex.org/I16733864"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5004379808"],"corresponding_institution_ids":["https://openalex.org/I16733864"],"apc_list":null,"apc_paid":null,"fwci":0.5773,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.7346095,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"112","last_page":"115"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9987000226974487,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/clock-generator","display_name":"Clock generator","score":0.8774095773696899},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.8379416465759277},{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.7997209429740906},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.7987271547317505},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.7376382946968079},{"id":"https://openalex.org/keywords/skew","display_name":"Skew","score":0.6802294254302979},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.6566376090049744},{"id":"https://openalex.org/keywords/settling-time","display_name":"Settling time","score":0.5204434990882874},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.503400981426239},{"id":"https://openalex.org/keywords/generator","display_name":"Generator (circuit theory)","score":0.48688092827796936},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.47440123558044434},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.424323707818985},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3704586923122406},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.36858680844306946},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.312389075756073},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.2453923523426056},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.23735785484313965},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.18312963843345642},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12212014198303223}],"concepts":[{"id":"https://openalex.org/C2778023540","wikidata":"https://www.wikidata.org/wiki/Q2164847","display_name":"Clock generator","level":4,"score":0.8774095773696899},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.8379416465759277},{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.7997209429740906},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.7987271547317505},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.7376382946968079},{"id":"https://openalex.org/C43711488","wikidata":"https://www.wikidata.org/wiki/Q7534783","display_name":"Skew","level":2,"score":0.6802294254302979},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.6566376090049744},{"id":"https://openalex.org/C14781684","wikidata":"https://www.wikidata.org/wiki/Q3983320","display_name":"Settling time","level":3,"score":0.5204434990882874},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.503400981426239},{"id":"https://openalex.org/C2780992000","wikidata":"https://www.wikidata.org/wiki/Q17016113","display_name":"Generator (circuit theory)","level":3,"score":0.48688092827796936},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.47440123558044434},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.424323707818985},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3704586923122406},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.36858680844306946},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.312389075756073},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.2453923523426056},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.23735785484313965},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.18312963843345642},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12212014198303223},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C160030872","wikidata":"https://www.wikidata.org/wiki/Q2142864","display_name":"Step response","level":2,"score":0.0},{"id":"https://openalex.org/C133731056","wikidata":"https://www.wikidata.org/wiki/Q4917288","display_name":"Control engineering","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5774895","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774895","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1586741581","https://openalex.org/W1986547568","https://openalex.org/W2034011126","https://openalex.org/W2117599119","https://openalex.org/W2143738690","https://openalex.org/W2163215998","https://openalex.org/W2169622190"],"related_works":["https://openalex.org/W2169622190","https://openalex.org/W2224788396","https://openalex.org/W2169618112","https://openalex.org/W3013924136","https://openalex.org/W2171851068","https://openalex.org/W2496244846","https://openalex.org/W2117814846","https://openalex.org/W2143420037","https://openalex.org/W2615366277","https://openalex.org/W2151256709"],"abstract_inverted_index":{"An":[0],"all-digital":[1],"de-skew":[2],"clock":[3,18,26,44,54,67],"generator":[4,45,55],"for":[5],"arbitrary":[6],"wide":[7],"range":[8],"delay":[9],"is":[10,29,38,76,86],"proposed":[11,43],"to":[12],"minimize":[13],"the":[14,17,36,83],"instability":[15],"of":[16,61],"settling":[19,71],"while":[20],"achieving":[21],"fast":[22],"locking":[23],"time.":[24,72],"The":[25,42,53,73],"skew":[27,37],"problem":[28],"detrimental":[30],"in":[31,48],"high-speed":[32],"applications,":[33],"especially":[34],"when":[35],"longer":[39],"than":[40],"multi-cycles.":[41],"was":[46],"fabricated":[47],"a":[49,57,89],"0.18-\u03bcm":[50],"CMOS":[51],"technology.":[52],"achieves":[56],"measured":[58],"RMS":[59],"jitter":[60],"8.3":[62],"ps":[63],"at":[64],"an":[65],"800-MHz":[66],"with":[68],"10":[69],"cycles":[70],"chip":[74],"area":[75],"0.825\u00d70.605":[77],"mm":[78],"<sup":[79],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[80],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</sup>":[81],"and":[82],"power":[84],"consumption":[85],"53mW":[87],"from":[88],"1.8V":[90],"supply.":[91]},"counts_by_year":[{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":1},{"year":2013,"cited_by_count":1},{"year":2012,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}