{"id":"https://openalex.org/W2164209567","doi":"https://doi.org/10.1109/apccas.2010.5774864","title":"Current-mode echo cancellation for full-duplex chip-to-chip data communication","display_name":"Current-mode echo cancellation for full-duplex chip-to-chip data communication","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2164209567","doi":"https://doi.org/10.1109/apccas.2010.5774864","mag":"2164209567"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5774864","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774864","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5085713825","display_name":"Vijaya Sankara Rao P","orcid":null},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Vijaya Sankara Rao P","raw_affiliation_strings":["Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5109378297","display_name":"Pradip Mandal","orcid":"https://orcid.org/0000-0002-3767-7299"},"institutions":[{"id":"https://openalex.org/I145894827","display_name":"Indian Institute of Technology Kharagpur","ror":"https://ror.org/03w5sq511","country_code":"IN","type":"education","lineage":["https://openalex.org/I145894827"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Pradip Mandal","raw_affiliation_strings":["Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India","institution_ids":["https://openalex.org/I145894827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5085713825"],"corresponding_institution_ids":["https://openalex.org/I145894827"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17480548,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"748","last_page":"751"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9991000294685364,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transimpedance-amplifier","display_name":"Transimpedance amplifier","score":0.6493788957595825},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.6175655722618103},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5631393790245056},{"id":"https://openalex.org/keywords/amplifier","display_name":"Amplifier","score":0.5609378814697266},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4605722427368164},{"id":"https://openalex.org/keywords/operational-transconductance-amplifier","display_name":"Operational transconductance amplifier","score":0.460495263338089},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.4551425576210022},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45411136746406555},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3709975481033325},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.35427945852279663},{"id":"https://openalex.org/keywords/operational-amplifier","display_name":"Operational amplifier","score":0.2886810898780823}],"concepts":[{"id":"https://openalex.org/C92631468","wikidata":"https://www.wikidata.org/wiki/Q215437","display_name":"Transimpedance amplifier","level":5,"score":0.6493788957595825},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.6175655722618103},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5631393790245056},{"id":"https://openalex.org/C194257627","wikidata":"https://www.wikidata.org/wiki/Q211554","display_name":"Amplifier","level":3,"score":0.5609378814697266},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4605722427368164},{"id":"https://openalex.org/C58117264","wikidata":"https://www.wikidata.org/wiki/Q1239595","display_name":"Operational transconductance amplifier","level":5,"score":0.460495263338089},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.4551425576210022},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45411136746406555},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3709975481033325},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.35427945852279663},{"id":"https://openalex.org/C145366948","wikidata":"https://www.wikidata.org/wiki/Q178947","display_name":"Operational amplifier","level":4,"score":0.2886810898780823}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5774864","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774864","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.800000011920929,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[{"id":"https://openalex.org/F4320321040","display_name":"National Science Council","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":7,"referenced_works":["https://openalex.org/W1538409159","https://openalex.org/W1846892043","https://openalex.org/W1998662530","https://openalex.org/W2103845095","https://openalex.org/W2118946652","https://openalex.org/W2175519525","https://openalex.org/W6649789128"],"related_works":["https://openalex.org/W1548231692","https://openalex.org/W2901662850","https://openalex.org/W2089646818","https://openalex.org/W2563596277","https://openalex.org/W4285244579","https://openalex.org/W2128713590","https://openalex.org/W2016099574","https://openalex.org/W1608271547","https://openalex.org/W1583521199","https://openalex.org/W2373849323"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"we":[3],"propose":[4],"current-mode":[5,21],"echo":[6,22],"cancellation":[7,23],"technique":[8],"for":[9,20],"full-duplex":[10],"chip-to-chip":[11],"data":[12,107],"communication.":[13],"A":[14],"new":[15],"hybrid":[16,27,47,80,119,152],"circuit":[17,28,120],"topology":[18,29,60],"suitable":[19],"is":[24,30,48,70,81,133,178],"presented.":[25],"The":[26,42,58,78,102,128,147,154,171],"shared":[31],"integration":[32],"of":[33,45,54,73,125,158,164,175],"an":[34],"operational":[35],"transconductance":[36],"amplifier(OTA)":[37],"and":[38,75,98,160,168],"a":[39,71,111],"transimpedance":[40],"amplifier(TIA).":[41],"output/back-port":[43],"impedance":[44,53],"the":[46,51,55,62,66,117,123,126,140,151,176],"matched":[49],"with":[50,89,116],"characteristic":[52],"transmission":[56],"line.":[57,127],"proposed":[59,79,118],"separates":[61],"inbound":[63,74],"wave":[64],"from":[65,143],"received":[67],"wave,":[68],"which":[69,92],"superposition":[72],"outbound":[76],"waves.":[77],"implemented":[82],"in":[83,139,150],"1.8-V,":[84],"0.18-\u03bcm":[85],"Digital":[86],"CMOS":[87],"technology":[88],"BSIM3v3":[90],"models":[91],"take":[93],"into":[94],"account":[95],"device":[96],"parasitic":[97],"second":[99],"order":[100],"effects.":[101],"simulated":[103],"performance":[104],"shows":[105],"4-Gb/s":[106],"transfer":[108],"rate":[109],"over":[110],"7.5-inch":[112,129],"FR4":[113,130],"PCB":[114,131],"trace":[115,132],"on":[121],"both":[122],"ends":[124],"modeled":[134],"by":[135],"measured":[136],"4-port":[137],"S-parameters":[138],"frequency":[141],"range":[142],"100-MHz":[144],"to":[145],"20-GHz.":[146],"power":[148],"consumed":[149],"10.64-mW.":[153],"output":[155],"noise":[156,162],"voltage":[157],"OTA":[159],"input-referred":[161],"current":[163],"TIA":[165],"are":[166],"4.32-mV":[167],"1.52-\u03bcA":[169],"respectively.":[170],"targeted":[172],"bit-error":[173],"rate(BER)":[174],"link":[177],"10":[179],"<sup":[180],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[181],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">-12</sup>":[182],".":[183]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
