{"id":"https://openalex.org/W2152862142","doi":"https://doi.org/10.1109/apccas.2010.5774831","title":"Efficient protocol converter generation for system integration","display_name":"Efficient protocol converter generation for system integration","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2152862142","doi":"https://doi.org/10.1109/apccas.2010.5774831","mag":"2152862142"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5774831","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774831","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5103416326","display_name":"Der-Wei Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Der-Wei Yang","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5053167526","display_name":"Ming\u2010Der Shieh","orcid":"https://orcid.org/0000-0002-7361-1860"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ming-Der Shieh","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5036914620","display_name":"Wen-Hsuen Kuo","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Wen-Hsuen Kuo","raw_affiliation_strings":["Primax Technologies, Inc., Canada"],"affiliations":[{"raw_affiliation_string":"Primax Technologies, Inc., Canada","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5009914383","display_name":"Jonas Wang","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Jonas Wang","raw_affiliation_strings":["Primax Technologies, Inc., Canada"],"affiliations":[{"raw_affiliation_string":"Primax Technologies, Inc., Canada","institution_ids":[]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5103416326"],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.17760432,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"8","issue":null,"first_page":"903","last_page":"906"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7692044973373413},{"id":"https://openalex.org/keywords/asynchronous-communication","display_name":"Asynchronous communication","score":0.6541576385498047},{"id":"https://openalex.org/keywords/protocol","display_name":"Protocol (science)","score":0.6455005407333374},{"id":"https://openalex.org/keywords/fifo","display_name":"FIFO (computing and electronics)","score":0.6406165361404419},{"id":"https://openalex.org/keywords/converters","display_name":"Converters","score":0.5819041132926941},{"id":"https://openalex.org/keywords/task","display_name":"Task (project management)","score":0.5122827887535095},{"id":"https://openalex.org/keywords/integrator","display_name":"Integrator","score":0.4139839708805084},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3475131094455719},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.33931541442871094},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.20939168334007263},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.19832256436347961},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.17383304238319397},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.12327387928962708},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.11556553840637207},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.09668070077896118},{"id":"https://openalex.org/keywords/systems-engineering","display_name":"Systems engineering","score":0.09547188878059387}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7692044973373413},{"id":"https://openalex.org/C151319957","wikidata":"https://www.wikidata.org/wiki/Q752739","display_name":"Asynchronous communication","level":2,"score":0.6541576385498047},{"id":"https://openalex.org/C2780385302","wikidata":"https://www.wikidata.org/wiki/Q367158","display_name":"Protocol (science)","level":3,"score":0.6455005407333374},{"id":"https://openalex.org/C2777145635","wikidata":"https://www.wikidata.org/wiki/Q515636","display_name":"FIFO (computing and electronics)","level":2,"score":0.6406165361404419},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.5819041132926941},{"id":"https://openalex.org/C2780451532","wikidata":"https://www.wikidata.org/wiki/Q759676","display_name":"Task (project management)","level":2,"score":0.5122827887535095},{"id":"https://openalex.org/C79518650","wikidata":"https://www.wikidata.org/wiki/Q2081431","display_name":"Integrator","level":3,"score":0.4139839708805084},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3475131094455719},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.33931541442871094},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.20939168334007263},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.19832256436347961},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.17383304238319397},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.12327387928962708},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.11556553840637207},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.09668070077896118},{"id":"https://openalex.org/C201995342","wikidata":"https://www.wikidata.org/wiki/Q682496","display_name":"Systems engineering","level":1,"score":0.09547188878059387},{"id":"https://openalex.org/C142724271","wikidata":"https://www.wikidata.org/wiki/Q7208","display_name":"Pathology","level":1,"score":0.0},{"id":"https://openalex.org/C204787440","wikidata":"https://www.wikidata.org/wiki/Q188504","display_name":"Alternative medicine","level":2,"score":0.0},{"id":"https://openalex.org/C71924100","wikidata":"https://www.wikidata.org/wiki/Q11190","display_name":"Medicine","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5774831","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774831","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4000000059604645,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1988661459","https://openalex.org/W2091528902","https://openalex.org/W2099034654","https://openalex.org/W2140537757","https://openalex.org/W2144974453","https://openalex.org/W2153829097","https://openalex.org/W2162910179","https://openalex.org/W2295505374","https://openalex.org/W2296360264","https://openalex.org/W6680913709","https://openalex.org/W6681558041","https://openalex.org/W6684287713"],"related_works":["https://openalex.org/W2366352762","https://openalex.org/W2613964090","https://openalex.org/W2081322886","https://openalex.org/W2380425739","https://openalex.org/W2349324463","https://openalex.org/W1988313539","https://openalex.org/W2027541371","https://openalex.org/W4363649224","https://openalex.org/W913418521","https://openalex.org/W2349510975"],"abstract_inverted_index":{"Integrate":[0],"intellectual":[1],"properties":[2],"(IP's)":[3],"designed":[4],"for":[5,13],"different":[6],"protocols":[7],"is":[8],"always":[9],"a":[10,40],"troublesome":[11],"task":[12],"system":[14,32],"integrators.":[15],"In":[16],"this":[17],"paper,":[18],"we":[19,38],"explore":[20],"efficient":[21,70],"methods":[22],"to":[23],"generate":[24],"protocol":[25,47],"converters":[26],"automatically":[27],"under":[28],"the":[29,35,65,72],"consideration":[30],"of":[31,64],"performance.":[33],"For":[34],"frequency/phase":[36],"mismatch,":[37],"proposed":[39],"modified":[41],"asynchronous":[42],"FIFO":[43],"together":[44],"with":[45],"our":[46],"converter.":[48],"The":[49,60],"generated":[50],"results":[51],"are":[52,68],"verified":[53],"in":[54],"Synopsis":[55],"Verification":[56],"IP":[57],"(VIP)":[58],"environment.":[59],"performance":[61],"and":[62],"cost":[63],"resulted":[66],"converter":[67],"as":[69,71],"manual":[73],"one,":[74],"ARM":[75],"Prime":[76],"Cell.":[77]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}