{"id":"https://openalex.org/W2133916413","doi":"https://doi.org/10.1109/apccas.2010.5774810","title":"An 8T SRAM cell with column-based dynamic supply voltage for bit-interleaving","display_name":"An 8T SRAM cell with column-based dynamic supply voltage for bit-interleaving","publication_year":2010,"publication_date":"2010-12-01","ids":{"openalex":"https://openalex.org/W2133916413","doi":"https://doi.org/10.1109/apccas.2010.5774810","mag":"2133916413"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2010.5774810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774810","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5101615706","display_name":"Anh Tuan","orcid":"https://orcid.org/0000-0002-8320-6818"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Anh Tuan Do","raw_affiliation_strings":["Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5009974389","display_name":"Kiat Seng Yeo","orcid":"https://orcid.org/0000-0002-4524-707X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Kiat Seng Yeo","raw_affiliation_strings":["Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5035102341","display_name":"Jeremy Yung Shern Low","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Jeremy Yung Shern Low","raw_affiliation_strings":["Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5019413100","display_name":"Joshua Yung Lih Low","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Joshua Yung Lih Low","raw_affiliation_strings":["Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5102243210","display_name":"Zhi Hui Kong","orcid":"https://orcid.org/0009-0004-4522-796X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Zhi Hui Kong","raw_affiliation_strings":["Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Centre of Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]},{"raw_affiliation_string":"[Centre for Integrated Circuits and Systems (CICS), School of Electrical and Electronics Engineering, Nanyang Technological University, Singapore]","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":0.8901,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":{"value":0.73569866,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":"44","issue":null,"first_page":"704","last_page":"707"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11522","display_name":"VLSI and FPGA Design Techniques","score":0.9997000098228455,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/interleaving","display_name":"Interleaving","score":0.8015366792678833},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.6841751933097839},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6444982886314392},{"id":"https://openalex.org/keywords/margin","display_name":"Margin (machine learning)","score":0.6225534677505493},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5868017673492432},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.5541627407073975},{"id":"https://openalex.org/keywords/dynamic-demand","display_name":"Dynamic demand","score":0.5501662492752075},{"id":"https://openalex.org/keywords/power","display_name":"Power (physics)","score":0.48861104249954224},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4837072491645813},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4825812876224518},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.4727048873901367},{"id":"https://openalex.org/keywords/column","display_name":"Column (typography)","score":0.4462750554084778},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.22677946090698242},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.22360116243362427},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2220124900341034},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.13594204187393188},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.0845155417919159},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.06516718864440918}],"concepts":[{"id":"https://openalex.org/C28034677","wikidata":"https://www.wikidata.org/wiki/Q17092530","display_name":"Interleaving","level":2,"score":0.8015366792678833},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.6841751933097839},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6444982886314392},{"id":"https://openalex.org/C774472","wikidata":"https://www.wikidata.org/wiki/Q6760393","display_name":"Margin (machine learning)","level":2,"score":0.6225534677505493},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5868017673492432},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.5541627407073975},{"id":"https://openalex.org/C45872418","wikidata":"https://www.wikidata.org/wiki/Q5318966","display_name":"Dynamic demand","level":3,"score":0.5501662492752075},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.48861104249954224},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4837072491645813},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4825812876224518},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.4727048873901367},{"id":"https://openalex.org/C2780551164","wikidata":"https://www.wikidata.org/wiki/Q2306599","display_name":"Column (typography)","level":3,"score":0.4462750554084778},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.22677946090698242},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.22360116243362427},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2220124900341034},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.13594204187393188},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0845155417919159},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.06516718864440918},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C119857082","wikidata":"https://www.wikidata.org/wiki/Q2539","display_name":"Machine learning","level":1,"score":0.0},{"id":"https://openalex.org/C126042441","wikidata":"https://www.wikidata.org/wiki/Q1324888","display_name":"Frame (networking)","level":2,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2010.5774810","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2010.5774810","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2010 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","score":0.8999999761581421,"display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W2066269170","https://openalex.org/W2095913060","https://openalex.org/W2106339466","https://openalex.org/W2141596871","https://openalex.org/W2155153274","https://openalex.org/W2155275912","https://openalex.org/W2160285928","https://openalex.org/W6683588402"],"related_works":["https://openalex.org/W2118528827","https://openalex.org/W2154145758","https://openalex.org/W2110839220","https://openalex.org/W2164440002","https://openalex.org/W1582224818","https://openalex.org/W2775062502","https://openalex.org/W3032966989","https://openalex.org/W2044270051","https://openalex.org/W2662219006","https://openalex.org/W4285609043"],"abstract_inverted_index":{"Lowering":[0],"power":[1,62,121],"consumption":[2],"and":[3,22,85,117],"increasing":[4],"noise":[5,83,115],"margin":[6,84,116],"have":[7,26],"become":[8],"two":[9],"central":[10],"topics":[11],"in":[12,97],"every":[13],"state":[14],"of":[15,33,90],"the":[16,30,34,49,66,81,86,91,109,125],"art":[17],"SRAM":[18,46,93],"design.":[19,69],"Several":[20],"8T":[21,45],"10T":[23],"cell":[24,31],"designs":[25],"been":[27,95],"reported,":[28],"improving":[29],"stability":[32],"conventional":[35,67,126],"6T.":[36],"In":[37],"this":[38],"paper,":[39],"we":[40],"use":[41],"a":[42,98],"fully":[43],"differential":[44],"that":[47,108],"removes":[48],"half-accessed":[50],"issue":[51],"to":[52,65,78,124],"allow":[53],"an":[54],"efficient":[55],"bit-interleaving":[56],"implementation.":[57],"It":[58],"also":[59],"consumes":[60,118],"less":[61,120],"when":[63,122],"compared":[64,123],"6T":[68,127],"A":[70,88],"column-based":[71],"dynamic":[72],"supply":[73,132],"voltage":[74],"scheme":[75],"is":[76],"utilized":[77],"improve":[79],"both":[80],"read":[82],"write-ability.":[87],"128\u00d764-bit":[89],"proposed":[92,110],"has":[94,112],"implemented":[96],"standard":[99],"65":[100],"nm/":[101],"1V":[102],"CMOS":[103],"process.":[104],"Simulation":[105],"results":[106],"reaffirmed":[107],"design":[111,128],"2x":[113],"higher":[114],"46%":[119],"at":[129],"1":[130],"V":[131],"voltage.":[133]},"counts_by_year":[{"year":2012,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}