{"id":"https://openalex.org/W2110994781","doi":"https://doi.org/10.1109/apccas.2008.4746371","title":"Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic","display_name":"Asymmetric dual-gate multi-fin keeper bias options and optimization for low power and robust FinFET domino logic","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2110994781","doi":"https://doi.org/10.1109/apccas.2008.4746371","mag":"2110994781"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2008.4746371","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2008.4746371","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5081512326","display_name":"Sherif Abdulkader Tawfik","orcid":"https://orcid.org/0000-0003-3592-1419"},"institutions":[{"id":"https://openalex.org/I135310074","display_name":"University of Wisconsin\u2013Madison","ror":"https://ror.org/01y2jtd41","country_code":"US","type":"education","lineage":["https://openalex.org/I135310074"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Sherif A. Tawfik","raw_affiliation_strings":["Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Madison, WI, USA","Dept. of Electr. & Comput. Eng., Univ. of Wisconsin -Madison, Madison, WI"],"affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, University of Wisconsin, Madison, Madison, WI, USA","institution_ids":["https://openalex.org/I135310074"]},{"raw_affiliation_string":"Dept. of Electr. & Comput. Eng., Univ. of Wisconsin -Madison, Madison, WI","institution_ids":["https://openalex.org/I135310074"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5042147600","display_name":"Volkan Kursun","orcid":"https://orcid.org/0000-0002-8050-1774"},"institutions":[{"id":"https://openalex.org/I200769079","display_name":"Hong Kong University of Science and Technology","ror":"https://ror.org/00q4vv597","country_code":"HK","type":"education","lineage":["https://openalex.org/I200769079"]}],"countries":["HK"],"is_corresponding":false,"raw_author_name":"Volkan Kursun","raw_affiliation_strings":["Department of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong, China","Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong#TAB#"],"affiliations":[{"raw_affiliation_string":"Department of Electronic and Computer Engineering, Hong Kong University of Science and Technology, Hong Kong, China","institution_ids":["https://openalex.org/I200769079"]},{"raw_affiliation_string":"Dept. of Electron. & Comput. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong#TAB#","institution_ids":["https://openalex.org/I200769079"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5081512326"],"corresponding_institution_ids":["https://openalex.org/I135310074"],"apc_list":null,"apc_paid":null,"fwci":0.678,"has_fulltext":false,"cited_by_count":5,"citation_normalized_percentile":{"value":0.73781541,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"1720","last_page":"1723"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/domino-logic","display_name":"Domino logic","score":0.8542264103889465},{"id":"https://openalex.org/keywords/noise-margin","display_name":"Noise margin","score":0.6390508413314819},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5674973130226135},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5599744319915771},{"id":"https://openalex.org/keywords/domino","display_name":"Domino","score":0.5579355955123901},{"id":"https://openalex.org/keywords/noise-immunity","display_name":"Noise immunity","score":0.5273785591125488},{"id":"https://openalex.org/keywords/threshold-voltage","display_name":"Threshold voltage","score":0.47634342312812805},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.46591925621032715},{"id":"https://openalex.org/keywords/noise","display_name":"Noise (video)","score":0.46354788541793823},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.4315762519836426},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.41392290592193604},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.41373851895332336},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.399605929851532},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.39280688762664795},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2956390380859375}],"concepts":[{"id":"https://openalex.org/C2777555262","wikidata":"https://www.wikidata.org/wiki/Q173391","display_name":"Domino logic","level":5,"score":0.8542264103889465},{"id":"https://openalex.org/C179499742","wikidata":"https://www.wikidata.org/wiki/Q1324892","display_name":"Noise margin","level":4,"score":0.6390508413314819},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5674973130226135},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5599744319915771},{"id":"https://openalex.org/C2776416436","wikidata":"https://www.wikidata.org/wiki/Q3751781","display_name":"Domino","level":3,"score":0.5579355955123901},{"id":"https://openalex.org/C2988494973","wikidata":"https://www.wikidata.org/wiki/Q179448","display_name":"Noise immunity","level":3,"score":0.5273785591125488},{"id":"https://openalex.org/C195370968","wikidata":"https://www.wikidata.org/wiki/Q1754002","display_name":"Threshold voltage","level":4,"score":0.47634342312812805},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.46591925621032715},{"id":"https://openalex.org/C99498987","wikidata":"https://www.wikidata.org/wiki/Q2210247","display_name":"Noise (video)","level":3,"score":0.46354788541793823},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.4315762519836426},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.41392290592193604},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.41373851895332336},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.399605929851532},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.39280688762664795},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2956390380859375},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C115961682","wikidata":"https://www.wikidata.org/wiki/Q860623","display_name":"Image (mathematics)","level":2,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C161790260","wikidata":"https://www.wikidata.org/wiki/Q82264","display_name":"Catalysis","level":2,"score":0.0},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/apccas.2008.4746371","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2008.4746371","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},{"id":"pmh:oai:repository.hkust.edu.hk:1783.1-27545","is_oa":false,"landing_page_url":"http://repository.hkust.edu.hk/ir/Record/1783.1-27545","pdf_url":null,"source":{"id":"https://openalex.org/S4306401796","display_name":"Rare & Special e-Zone (The Hong Kong University of Science and Technology)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I200769079","host_organization_name":"Hong Kong University of Science and Technology","host_organization_lineage":["https://openalex.org/I200769079"],"host_organization_lineage_names":[],"type":"repository"},"license":null,"license_id":null,"version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"Conference paper"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8999999761581421,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1985055077","https://openalex.org/W2083124406","https://openalex.org/W2104628168","https://openalex.org/W2131487004","https://openalex.org/W2162018037","https://openalex.org/W2164547152","https://openalex.org/W4254118099","https://openalex.org/W6684497692"],"related_works":["https://openalex.org/W4231158717","https://openalex.org/W3174071739","https://openalex.org/W2131531464","https://openalex.org/W1996043106","https://openalex.org/W3201227081","https://openalex.org/W2529167390","https://openalex.org/W2014775954","https://openalex.org/W2045506892","https://openalex.org/W2058400468","https://openalex.org/W2142914495"],"abstract_inverted_index":{"A":[0],"variable":[1,82],"threshold":[2,28,83],"voltage":[3,29,84],"keeper":[4,32,51,87],"circuit":[5,38,88,115],"technique":[6,89],"using":[7],"independent-gate":[8,50],"FinFET":[9,77,125],"technology":[10],"is":[11,34,93],"proposed":[12],"in":[13,23,61,121],"this":[14],"paper":[15],"for":[16,57,117],"simultaneous":[17],"power":[18,64,102],"reduction":[19],"and":[20,63],"speed":[21,92],"enhancement":[22],"domino":[24,78,113],"logic":[25,114],"circuits.":[26,79],"The":[27,48],"of":[30],"a":[31,111,122],"transistor":[33],"dynamically":[35],"modified":[36],"during":[37],"operation":[39],"to":[40,73,97,106,110],"reduce":[41],"contention":[42],"current":[43],"without":[44],"sacrificing":[45],"noise":[46,69,119],"immunity.":[47],"optimum":[49],"gate":[52],"bias":[53],"conditions":[54],"are":[55],"identified":[56],"achieving":[58],"maximum":[59],"savings":[60],"delay":[62],"consumption":[65,103],"while":[66,99],"maintaining":[67],"identical":[68],"immunity":[70],"as":[71,108],"compared":[72,109],"the":[74,81,90,101],"standard":[75,112],"tied-gate":[76],"With":[80],"asymmetric":[85],"double-gate":[86],"evaluation":[91],"enhanced":[94],"by":[95,104],"up":[96,105],"49%":[98],"reducing":[100],"46%":[107],"designed":[116],"similar":[118],"margin":[120],"32":[123],"nm":[124],"technology.":[126]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2013,"cited_by_count":1}],"updated_date":"2026-04-15T08:11:43.952461","created_date":"2025-10-10T00:00:00"}