{"id":"https://openalex.org/W2136287172","doi":"https://doi.org/10.1109/apccas.2008.4746125","title":"A novel configurable no dead-zone digital phase detector design","display_name":"A novel configurable no dead-zone digital phase detector design","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2136287172","doi":"https://doi.org/10.1109/apccas.2008.4746125","mag":"2136287172"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2008.4746125","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2008.4746125","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100340937","display_name":"Min Wang","orcid":"https://orcid.org/0000-0002-7676-2285"},"institutions":[{"id":"https://openalex.org/I4210089056","display_name":"Beijing Microelectronics Technology Institute","ror":"https://ror.org/007y7ej30","country_code":"CN","type":"other","lineage":["https://openalex.org/I4210089056"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Min Wang","raw_affiliation_strings":["Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","BMTI, Beijing Microelectron. Tech. Instn., Beijing"],"affiliations":[{"raw_affiliation_string":"Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","institution_ids":["https://openalex.org/I4210089056"]},{"raw_affiliation_string":"BMTI, Beijing Microelectron. Tech. Instn., Beijing","institution_ids":["https://openalex.org/I4210089056"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5103636162","display_name":"Zhiping Wen","orcid":null},"institutions":[{"id":"https://openalex.org/I4210089056","display_name":"Beijing Microelectronics Technology Institute","ror":"https://ror.org/007y7ej30","country_code":"CN","type":"other","lineage":["https://openalex.org/I4210089056"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhiping Wen","raw_affiliation_strings":["Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","BMTI, Beijing Microelectron. Tech. Instn., Beijing"],"affiliations":[{"raw_affiliation_string":"Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","institution_ids":["https://openalex.org/I4210089056"]},{"raw_affiliation_string":"BMTI, Beijing Microelectron. Tech. Instn., Beijing","institution_ids":["https://openalex.org/I4210089056"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100333589","display_name":"Lei Chen","orcid":"https://orcid.org/0000-0003-4972-6753"},"institutions":[{"id":"https://openalex.org/I4210089056","display_name":"Beijing Microelectronics Technology Institute","ror":"https://ror.org/007y7ej30","country_code":"CN","type":"other","lineage":["https://openalex.org/I4210089056"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Lei Chen","raw_affiliation_strings":["Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","BMTI, Beijing Microelectron. Tech. Instn., Beijing"],"affiliations":[{"raw_affiliation_string":"Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","institution_ids":["https://openalex.org/I4210089056"]},{"raw_affiliation_string":"BMTI, Beijing Microelectron. Tech. Instn., Beijing","institution_ids":["https://openalex.org/I4210089056"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5004439335","display_name":"Yanlong Zhang","orcid":"https://orcid.org/0000-0002-8717-3160"},"institutions":[{"id":"https://openalex.org/I4210089056","display_name":"Beijing Microelectronics Technology Institute","ror":"https://ror.org/007y7ej30","country_code":"CN","type":"other","lineage":["https://openalex.org/I4210089056"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yanlong Zhang","raw_affiliation_strings":["Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","BMTI, Beijing Microelectron. Tech. Instn., Beijing"],"affiliations":[{"raw_affiliation_string":"Beijing Microelectronics Tech. Institution, BMTI, Beijing, China","institution_ids":["https://openalex.org/I4210089056"]},{"raw_affiliation_string":"BMTI, Beijing Microelectron. Tech. Instn., Beijing","institution_ids":["https://openalex.org/I4210089056"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5100340937"],"corresponding_institution_ids":["https://openalex.org/I4210089056"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.15056168,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":null,"issue":null,"first_page":"721","last_page":"724"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/detector","display_name":"Detector","score":0.7214573621749878},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.6992696523666382},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5967053771018982},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5361952781677246},{"id":"https://openalex.org/keywords/gate-array","display_name":"Gate array","score":0.5224123001098633},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.5069273114204407},{"id":"https://openalex.org/keywords/phase-detector","display_name":"Phase detector","score":0.47823017835617065},{"id":"https://openalex.org/keywords/sensitivity","display_name":"Sensitivity (control systems)","score":0.44714248180389404},{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.4406168758869171},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4373968243598938},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.41998639702796936},{"id":"https://openalex.org/keywords/dead-zone","display_name":"Dead zone","score":0.41577354073524475},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.33842402696609497},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.33188396692276},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.3192281126976013},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.2626960575580597},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.12111285328865051},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.08307304978370667}],"concepts":[{"id":"https://openalex.org/C94915269","wikidata":"https://www.wikidata.org/wiki/Q1834857","display_name":"Detector","level":2,"score":0.7214573621749878},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.6992696523666382},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5967053771018982},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5361952781677246},{"id":"https://openalex.org/C114237110","wikidata":"https://www.wikidata.org/wiki/Q114901","display_name":"Gate array","level":3,"score":0.5224123001098633},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.5069273114204407},{"id":"https://openalex.org/C110086884","wikidata":"https://www.wikidata.org/wiki/Q2085341","display_name":"Phase detector","level":3,"score":0.47823017835617065},{"id":"https://openalex.org/C21200559","wikidata":"https://www.wikidata.org/wiki/Q7451068","display_name":"Sensitivity (control systems)","level":2,"score":0.44714248180389404},{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.4406168758869171},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4373968243598938},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.41998639702796936},{"id":"https://openalex.org/C63840607","wikidata":"https://www.wikidata.org/wiki/Q1236263","display_name":"Dead zone","level":2,"score":0.41577354073524475},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.33842402696609497},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.33188396692276},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.3192281126976013},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.2626960575580597},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.12111285328865051},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.08307304978370667},{"id":"https://openalex.org/C111368507","wikidata":"https://www.wikidata.org/wiki/Q43518","display_name":"Oceanography","level":1,"score":0.0},{"id":"https://openalex.org/C127313418","wikidata":"https://www.wikidata.org/wiki/Q1069","display_name":"Geology","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2008.4746125","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2008.4746125","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":14,"referenced_works":["https://openalex.org/W1993932238","https://openalex.org/W2085860427","https://openalex.org/W2104663654","https://openalex.org/W2105511666","https://openalex.org/W2108537242","https://openalex.org/W2128305711","https://openalex.org/W2128544353","https://openalex.org/W2147099349","https://openalex.org/W2151590723","https://openalex.org/W2153267648","https://openalex.org/W2158959564","https://openalex.org/W2280387905","https://openalex.org/W2308873001","https://openalex.org/W6698123741"],"related_works":["https://openalex.org/W3151633427","https://openalex.org/W2212894501","https://openalex.org/W2793465010","https://openalex.org/W3024050170","https://openalex.org/W4293253840","https://openalex.org/W2101934252","https://openalex.org/W1547653950","https://openalex.org/W2377447639","https://openalex.org/W2136827374","https://openalex.org/W4220728459"],"abstract_inverted_index":{"A":[0],"novel":[1,43],"configurable":[2],"no":[3],"dead-zone":[4,47],"digital":[5,66],"phase":[6,27,44],"detector":[7,28,45],"is":[8,17,82],"proposed":[9,100],"in":[10,74,86],"this":[11],"paper.":[12],"As":[13],"an":[14],"embedded":[15],"SRAM":[16],"employed":[18],"to":[19,37,84,93],"store":[20],"configuration":[21,34],"data,":[22],"detection":[23],"sensitivity":[24],"of":[25,63,90],"the":[26,33,42,87,99],"can":[29,60,70],"be":[30,61,72],"controlled":[31],"by":[32,48],"data":[35],"according":[36],"different":[38],"input":[39],"frequency.":[40],"Besides,":[41],"avoid":[46],"adopting":[49],"two":[50],"flip-flops":[51],"and":[52,69],"generating":[53],"three":[54],"state":[55],"during":[56],"operation.":[57],"The":[58,80],"circuit":[59,101],"part":[62],"a":[64],"standard":[65],"cell":[67],"library":[68],"easily":[71],"used":[73],"field":[75],"programmable":[76],"gate":[77],"array":[78],"(FPGA).":[79],"PD":[81],"designed":[83],"betake":[85],"frequency":[88],"range":[89],"25":[91],"MHz":[92],"200":[94],"MHz.":[95],"Simulation":[96],"result":[97],"for":[98],"realized":[102],"with":[103],"0.18":[104],"um":[105],"CMOS":[106],"technology.":[107]},"counts_by_year":[{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":2},{"year":2016,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
