{"id":"https://openalex.org/W2126707703","doi":"https://doi.org/10.1109/apccas.2008.4746115","title":"A 1.25Gbps all-digital clock and data recovery circuit with binary frequency acquisition","display_name":"A 1.25Gbps all-digital clock and data recovery circuit with binary frequency acquisition","publication_year":2008,"publication_date":"2008-11-01","ids":{"openalex":"https://openalex.org/W2126707703","doi":"https://doi.org/10.1109/apccas.2008.4746115","mag":"2126707703"},"language":"en","primary_location":{"id":"doi:10.1109/apccas.2008.4746115","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2008.4746115","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5098094092","display_name":"Chi-Shuang Oulee","orcid":null},"institutions":[{"id":"https://openalex.org/I173093425","display_name":"Chang Gung University","ror":"https://ror.org/00d80zx46","country_code":"TW","type":"education","lineage":["https://openalex.org/I173093425"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Chi-Shuang Oulee","raw_affiliation_strings":["Department of Electrical Engineering, Chang Gung University, Taoyuan, Taiwan","Dept. of Electr. Eng., Chang Gung Univ., TaoYuan"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, Chang Gung University, Taoyuan, Taiwan","institution_ids":["https://openalex.org/I173093425"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Chang Gung Univ., TaoYuan","institution_ids":["https://openalex.org/I173093425"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5110211948","display_name":"Rong-Jyi Yang","orcid":null},"institutions":[{"id":"https://openalex.org/I154864474","display_name":"National Taiwan University of Science and Technology","ror":"https://ror.org/00q09pe49","country_code":"TW","type":"education","lineage":["https://openalex.org/I154864474"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Rong-Jyi Yang","raw_affiliation_strings":["Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","Dept. of Electr. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei#TAB#"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Taiwan University of Science and Technology, Taipei, Taiwan","institution_ids":["https://openalex.org/I154864474"]},{"raw_affiliation_string":"Dept. of Electr. Eng., Nat. Taiwan Univ. of Sci. & Technol., Taipei#TAB#","institution_ids":["https://openalex.org/I154864474"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.6784,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.74269057,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":null,"issue":null,"first_page":"680","last_page":"683"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10299","display_name":"Photonic and Optical Devices","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.9046161770820618},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.6015276908874512},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5855830907821655},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.5588283538818359},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.5193927884101868},{"id":"https://openalex.org/keywords/binary-data","display_name":"Binary data","score":0.47208473086357117},{"id":"https://openalex.org/keywords/phase-locked-loop","display_name":"Phase-locked loop","score":0.433589369058609},{"id":"https://openalex.org/keywords/data-acquisition","display_name":"Data acquisition","score":0.42600953578948975},{"id":"https://openalex.org/keywords/data-recovery","display_name":"Data recovery","score":0.4238618016242981},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4188840091228485},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.409205824136734},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.40430623292922974},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.265739381313324},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1480688750743866},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.13740864396095276},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.10018554329872131},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.08584725856781006}],"concepts":[{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.9046161770820618},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.6015276908874512},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5855830907821655},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.5588283538818359},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.5193927884101868},{"id":"https://openalex.org/C2779190172","wikidata":"https://www.wikidata.org/wiki/Q4913888","display_name":"Binary data","level":3,"score":0.47208473086357117},{"id":"https://openalex.org/C12707504","wikidata":"https://www.wikidata.org/wiki/Q52637","display_name":"Phase-locked loop","level":3,"score":0.433589369058609},{"id":"https://openalex.org/C163985040","wikidata":"https://www.wikidata.org/wiki/Q1172399","display_name":"Data acquisition","level":2,"score":0.42600953578948975},{"id":"https://openalex.org/C529754248","wikidata":"https://www.wikidata.org/wiki/Q1054772","display_name":"Data recovery","level":2,"score":0.4238618016242981},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4188840091228485},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.409205824136734},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.40430623292922974},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.265739381313324},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1480688750743866},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.13740864396095276},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.10018554329872131},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.08584725856781006},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/apccas.2008.4746115","is_oa":false,"landing_page_url":"https://doi.org/10.1109/apccas.2008.4746115","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"APCCAS 2008 - 2008 IEEE Asia Pacific Conference on Circuits and Systems","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.7599999904632568,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":8,"referenced_works":["https://openalex.org/W1533711155","https://openalex.org/W1538158511","https://openalex.org/W2076935827","https://openalex.org/W2090760012","https://openalex.org/W2102168960","https://openalex.org/W2126057508","https://openalex.org/W2137120286","https://openalex.org/W2148195081"],"related_works":["https://openalex.org/W3217463396","https://openalex.org/W2790557758","https://openalex.org/W2516396101","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2015457513","https://openalex.org/W2300671402","https://openalex.org/W4312888585","https://openalex.org/W2295601265","https://openalex.org/W2148370333"],"abstract_inverted_index":{"This":[0],"paper":[1],"describes":[2],"a":[3,49,62,90],"1.25-Gb/s":[4],"all-digital":[5],"clock":[6,42],"and":[7,39,57,79],"data":[8],"recovery":[9],"(ADCDR)":[10],"circuit":[11,47],"with":[12],"binary":[13,71],"frequency":[14,72],"acquisition":[15,73],"which":[16],"is":[17,75,84],"never":[18],"achieved":[19],"in":[20],"reference-less":[21],"ADCDR":[22,46],"systems.":[23],"The":[24,44,94],"proposed":[25,45],"configuration":[26],"of":[27,52],"digital":[28],"loop":[29,37],"filter":[30],"without":[31],"any":[32],"adder":[33],"can":[34],"minimize":[35],"to":[36],"latency":[38],"the":[40,70,80],"recovered":[41,95],"jitter.":[43,101],"occupies":[48],"chip":[50],"area":[51],"0.9\u00d70.7mm":[53],"<inf":[54],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[55],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">2</inf>":[56],"consumes":[58],"80":[59],"mW":[60],"from":[61],"single":[63],"1.8-V":[64],"power":[65],"supply.":[66],"Simulation":[67],"results":[68],"show":[69],"time":[74,83],"less":[76,85],"than":[77,86],"500ns":[78],"total":[81],"lock":[82],"800ns":[87],"while":[88],"receiving":[89],"1.25Gb/s":[91],"NRZ":[92],"data.":[93],"eye":[96],"diagram":[97],"exhibits":[98],"45ps":[99],"peak-peak":[100]},"counts_by_year":[{"year":2019,"cited_by_count":1},{"year":2017,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}