{"id":"https://openalex.org/W3176511209","doi":"https://doi.org/10.1109/aicas51828.2021.9458501","title":"NeuroSim Validation with 40nm RRAM Compute-in-Memory Macro","display_name":"NeuroSim Validation with 40nm RRAM Compute-in-Memory Macro","publication_year":2021,"publication_date":"2021-06-06","ids":{"openalex":"https://openalex.org/W3176511209","doi":"https://doi.org/10.1109/aicas51828.2021.9458501","mag":"3176511209"},"language":"en","primary_location":{"id":"doi:10.1109/aicas51828.2021.9458501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aicas51828.2021.9458501","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5072117537","display_name":"Anni Lu","orcid":"https://orcid.org/0000-0002-4415-0866"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Anni Lu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076031530","display_name":"Xiaochen Peng","orcid":"https://orcid.org/0000-0001-6148-7711"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Xiaochen Peng","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101936941","display_name":"Wantong Li","orcid":"https://orcid.org/0000-0002-8288-393X"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Wantong Li","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5013020304","display_name":"Hongwu Jiang","orcid":"https://orcid.org/0000-0002-3048-5948"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Hongwu Jiang","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5054894631","display_name":"Shimeng Yu","orcid":"https://orcid.org/0000-0002-0068-3652"},"institutions":[{"id":"https://openalex.org/I130701444","display_name":"Georgia Institute of Technology","ror":"https://ror.org/01zkghx44","country_code":"US","type":"education","lineage":["https://openalex.org/I130701444"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Shimeng Yu","raw_affiliation_strings":["School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, USA","institution_ids":["https://openalex.org/I130701444"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I130701444"],"apc_list":null,"apc_paid":null,"fwci":1.4238,"has_fulltext":false,"cited_by_count":18,"citation_normalized_percentile":{"value":0.81315837,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10036","display_name":"Advanced Neural Network Applications","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/1707","display_name":"Computer Vision and Pattern Recognition"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7080154418945312},{"id":"https://openalex.org/keywords/benchmark","display_name":"Benchmark (surveying)","score":0.6660118103027344},{"id":"https://openalex.org/keywords/resistive-random-access-memory","display_name":"Resistive random-access memory","score":0.6386699676513672},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.5766423344612122},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.512719988822937},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5122970342636108},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.48079314827919006},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.4581552743911743},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.45624154806137085},{"id":"https://openalex.org/keywords/energy-consumption","display_name":"Energy consumption","score":0.4106171131134033},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3753160238265991},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.36887073516845703},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.34258633852005005},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.3288682699203491},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.1662364900112152},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13797345757484436}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7080154418945312},{"id":"https://openalex.org/C185798385","wikidata":"https://www.wikidata.org/wiki/Q1161707","display_name":"Benchmark (surveying)","level":2,"score":0.6660118103027344},{"id":"https://openalex.org/C182019814","wikidata":"https://www.wikidata.org/wiki/Q1143830","display_name":"Resistive random-access memory","level":3,"score":0.6386699676513672},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.5766423344612122},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.512719988822937},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5122970342636108},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.48079314827919006},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.4581552743911743},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.45624154806137085},{"id":"https://openalex.org/C2780165032","wikidata":"https://www.wikidata.org/wiki/Q16869822","display_name":"Energy consumption","level":2,"score":0.4106171131134033},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3753160238265991},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.36887073516845703},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.34258633852005005},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.3288682699203491},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.1662364900112152},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13797345757484436},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C13280743","wikidata":"https://www.wikidata.org/wiki/Q131089","display_name":"Geodesy","level":1,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C205649164","wikidata":"https://www.wikidata.org/wiki/Q1071","display_name":"Geography","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/aicas51828.2021.9458501","is_oa":false,"landing_page_url":"https://doi.org/10.1109/aicas51828.2021.9458501","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2021 IEEE 3rd International Conference on Artificial Intelligence Circuits and Systems (AICAS)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":12,"referenced_works":["https://openalex.org/W1937359183","https://openalex.org/W2010202670","https://openalex.org/W2736591611","https://openalex.org/W2782046614","https://openalex.org/W2794194363","https://openalex.org/W3005619596","https://openalex.org/W3012561096","https://openalex.org/W3015432327","https://openalex.org/W3015980402","https://openalex.org/W3136117125","https://openalex.org/W3141540147","https://openalex.org/W6705165511"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W2054635671","https://openalex.org/W1928481607","https://openalex.org/W2545245183","https://openalex.org/W3195722497","https://openalex.org/W2167784970","https://openalex.org/W1980301972","https://openalex.org/W2587448511"],"abstract_inverted_index":{"Compute-in-memory":[0],"(CIM)":[1],"is":[2,51,181],"an":[3,52],"attractive":[4],"solution":[5],"to":[6,66,70,121,156],"process":[7,117],"the":[8,79,92,103,109,112,123,126,130,139,143,177,189],"extensive":[9],"workloads":[10],"of":[11,26,47,81,94],"multiply-and-accumulate":[12],"(MAC)":[13],"operations":[14],"in":[15,164],"deep":[16],"neural":[17],"network":[18],"(DNN)":[19],"hardware":[20],"accelerators.":[21,49],"A":[22],"simulator":[23],"with":[24,147,183],"options":[25,63],"various":[27],"mainstream":[28],"and":[29,34,58,68,77,97,106,115,134,161,169],"emerging":[30],"memory":[31,95],"technologies,":[32],"architectures":[33],"networks":[35],"can":[36],"be":[37,122],"a":[38,84],"great":[39],"convenience":[40],"for":[41,158],"fast":[42],"early-stage":[43],"design":[44,62],"space":[45],"exploration":[46],"CIM":[48,60,87],"DNN+NeuroSim":[50],"integrated":[53],"benchmark":[54],"framework":[55],"supporting":[56],"flexible":[57],"hierarchical":[59],"array":[61],"from":[64,102,138,149,179],"device-level,":[65],"circuit-level":[67],"up":[69],"algorithm-level.":[71],"In":[72],"this":[73],"paper,":[74],"we":[75],"validate":[76],"calibrate":[78],"prediction":[80,178],"NeuroSim":[82,110,180],"against":[83],"40nm":[85],"RRAM-based":[86],"macro":[88],"post-layout":[89,170],"simulations.":[90],"First,":[91],"parameters":[93],"device":[96],"CMOS":[98],"transistor":[99,159],"are":[100,118,145,154],"extracted":[101],"TSMC's":[104],"PDK":[105],"employed":[107],"on":[108],"settings;":[111],"peripheral":[113],"modules":[114],"operating":[116],"also":[119],"configured":[120],"same":[124],"as":[125],"actual":[127],"chip.":[128],"Next,":[129],"area,":[131],"critical":[132],"path":[133],"energy":[135],"consumption":[136],"values":[137],"SPICE":[140],"simulations":[141],"at":[142],"module-level":[144],"compared":[146],"those":[148],"NeuroSim.":[150],"Some":[151],"adjustment":[152],"factors":[153],"introduced":[155],"account":[157],"sizing":[160],"wiring":[162],"area":[163],"layout,":[165],"gate":[166],"switching":[167],"activity":[168],"performance":[171],"drop,":[172],"etc.":[173],"We":[174],"show":[175],"that":[176],"precise":[182],"chip-level":[184],"error":[185],"under":[186],"1%":[187],"after":[188],"calibration.":[190]},"counts_by_year":[{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":7},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":2},{"year":2021,"cited_by_count":1}],"updated_date":"2026-06-26T08:34:08.712188","created_date":"2025-10-10T00:00:00"}