{"id":"https://openalex.org/W2066089224","doi":"https://doi.org/10.1109/afrcon.2011.6072187","title":"FPGA transceiver for space environment","display_name":"FPGA transceiver for space environment","publication_year":2011,"publication_date":"2011-09-01","ids":{"openalex":"https://openalex.org/W2066089224","doi":"https://doi.org/10.1109/afrcon.2011.6072187","mag":"2066089224"},"language":"en","primary_location":{"id":"doi:10.1109/afrcon.2011.6072187","is_oa":false,"landing_page_url":"https://doi.org/10.1109/afrcon.2011.6072187","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Africon '11","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5011093477","display_name":"Cezary Jezierski","orcid":null},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":true,"raw_author_name":"Cezary Jezierski","raw_affiliation_strings":["Institute of Radioelectronics, Warsaw University of Technology, Warsaw, Poland","Institute of Radioelectronics, Warsaw University of Technology, Poland#TAB#"],"affiliations":[{"raw_affiliation_string":"Institute of Radioelectronics, Warsaw University of Technology, Warsaw, Poland","institution_ids":["https://openalex.org/I108403487"]},{"raw_affiliation_string":"Institute of Radioelectronics, Warsaw University of Technology, Poland#TAB#","institution_ids":["https://openalex.org/I108403487"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044655688","display_name":"J\u00f3zef Modelski","orcid":"https://orcid.org/0000-0001-8533-1834"},"institutions":[{"id":"https://openalex.org/I108403487","display_name":"Warsaw University of Technology","ror":"https://ror.org/00y0xnp53","country_code":"PL","type":"education","lineage":["https://openalex.org/I108403487"]}],"countries":["PL"],"is_corresponding":false,"raw_author_name":"Jozef Modelski","raw_affiliation_strings":["Institute of Radioelectronics, Warsaw University of Technology, Warsaw, Poland","Institute of Radioelectronics, Warsaw University of Technology, Poland#TAB#"],"affiliations":[{"raw_affiliation_string":"Institute of Radioelectronics, Warsaw University of Technology, Warsaw, Poland","institution_ids":["https://openalex.org/I108403487"]},{"raw_affiliation_string":"Institute of Radioelectronics, Warsaw University of Technology, Poland#TAB#","institution_ids":["https://openalex.org/I108403487"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5011093477"],"corresponding_institution_ids":["https://openalex.org/I108403487"],"apc_list":null,"apc_paid":null,"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.11325133,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"4"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.8061000108718872,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12941","display_name":"Embedded Systems and FPGA Design","score":0.8061000108718872,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.7936000227928162,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13292","display_name":"Embedded Systems and FPGA Applications","score":0.7646999955177307,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/modelsim","display_name":"ModelSim","score":0.9243162870407104},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8663010597229004},{"id":"https://openalex.org/keywords/transceiver","display_name":"Transceiver","score":0.8259004354476929},{"id":"https://openalex.org/keywords/stratix","display_name":"Stratix","score":0.7574945688247681},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.694055438041687},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6513890624046326},{"id":"https://openalex.org/keywords/demodulation","display_name":"Demodulation","score":0.5914421081542969},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5374119877815247},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5314993262290955},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5300944447517395},{"id":"https://openalex.org/keywords/serdes","display_name":"SerDes","score":0.4101569652557373},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.15891492366790771},{"id":"https://openalex.org/keywords/wireless","display_name":"Wireless","score":0.13774073123931885},{"id":"https://openalex.org/keywords/vhdl","display_name":"VHDL","score":0.09654679894447327}],"concepts":[{"id":"https://openalex.org/C2778571676","wikidata":"https://www.wikidata.org/wiki/Q3317826","display_name":"ModelSim","level":4,"score":0.9243162870407104},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8663010597229004},{"id":"https://openalex.org/C7720470","wikidata":"https://www.wikidata.org/wiki/Q954187","display_name":"Transceiver","level":3,"score":0.8259004354476929},{"id":"https://openalex.org/C2776277307","wikidata":"https://www.wikidata.org/wiki/Q22074755","display_name":"Stratix","level":3,"score":0.7574945688247681},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.694055438041687},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6513890624046326},{"id":"https://openalex.org/C195251586","wikidata":"https://www.wikidata.org/wiki/Q1185939","display_name":"Demodulation","level":3,"score":0.5914421081542969},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5374119877815247},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5314993262290955},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5300944447517395},{"id":"https://openalex.org/C19707634","wikidata":"https://www.wikidata.org/wiki/Q6510662","display_name":"SerDes","level":2,"score":0.4101569652557373},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.15891492366790771},{"id":"https://openalex.org/C555944384","wikidata":"https://www.wikidata.org/wiki/Q249","display_name":"Wireless","level":2,"score":0.13774073123931885},{"id":"https://openalex.org/C36941000","wikidata":"https://www.wikidata.org/wiki/Q209455","display_name":"VHDL","level":3,"score":0.09654679894447327},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/afrcon.2011.6072187","is_oa":false,"landing_page_url":"https://doi.org/10.1109/afrcon.2011.6072187","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Africon '11","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.8299999833106995,"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W602937858","https://openalex.org/W2115297790","https://openalex.org/W2482765689","https://openalex.org/W6618359915","https://openalex.org/W6677053953"],"related_works":["https://openalex.org/W2130047965","https://openalex.org/W3145088891","https://openalex.org/W2021841285","https://openalex.org/W3087888791","https://openalex.org/W2957422867","https://openalex.org/W2353334636","https://openalex.org/W2143950660","https://openalex.org/W3160420002","https://openalex.org/W2382232495","https://openalex.org/W2116296956"],"abstract_inverted_index":{"FPGA":[0],"structures":[1],"have":[2],"the":[3,41],"advantage":[4],"over":[5],"analog":[6],"solutions":[7],"in":[8,21,34],"weight,":[9],"dimensions":[10],"and":[11,28,37,51,55,68],"power":[12],"consumption.":[13],"Four":[14],"elements":[15],"of":[16],"digital":[17,49],"transceiver":[18],"were":[19,32,43,57],"implemented":[20,67],"FPGA:":[22],"scrambler,":[23],"Reed-Solomon":[24],"coder,":[25],"RS":[26],"decoder":[27],"FIR":[29],"filter.":[30],"They":[31],"simulated":[33],"Quartus,":[35],"Simulink":[36],"Modelsim":[38],"environments.":[39],"Finally":[40],"blocks":[42],"linked":[44],"together":[45],"into":[46],"one":[47],"fully":[48],"transmitter":[50],"receiver.":[52],"The":[53,63],"modulator":[54],"demodulator":[56],"designed":[58],"with":[59],"IPcores":[60],"from":[61],"Altera.":[62],"whole":[64],"design":[65],"was":[66],"tested":[69],"on":[70],"Altera":[71],"Stratix-II":[72],"DSP":[73],"Development":[74],"Board.":[75]},"counts_by_year":[],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}