{"id":"https://openalex.org/W2594474754","doi":"https://doi.org/10.1109/acssc.2016.7869644","title":"Optimized memristor-based ripple carry adders","display_name":"Optimized memristor-based ripple carry adders","publication_year":2016,"publication_date":"2016-11-01","ids":{"openalex":"https://openalex.org/W2594474754","doi":"https://doi.org/10.1109/acssc.2016.7869644","mag":"2594474754"},"language":"en","primary_location":{"id":"doi:10.1109/acssc.2016.7869644","is_oa":false,"landing_page_url":"https://doi.org/10.1109/acssc.2016.7869644","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 50th Asilomar Conference on Signals, Systems and Computers","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5063845888","display_name":"Lauren Guckert","orcid":"https://orcid.org/0000-0002-0720-5661"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":true,"raw_author_name":"Lauren Guckert","raw_affiliation_strings":["School of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5028439610","display_name":"Earl E. Swartzlander","orcid":"https://orcid.org/0000-0002-8699-5277"},"institutions":[{"id":"https://openalex.org/I86519309","display_name":"The University of Texas at Austin","ror":"https://ror.org/00hj54h04","country_code":"US","type":"education","lineage":["https://openalex.org/I86519309"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Earl Swartzlander","raw_affiliation_strings":["School of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Computer Engineering, University of Texas at Austin, Austin, Texas","institution_ids":["https://openalex.org/I86519309"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":["https://openalex.org/A5063845888"],"corresponding_institution_ids":["https://openalex.org/I86519309"],"apc_list":null,"apc_paid":null,"fwci":0.7351,"has_fulltext":false,"cited_by_count":13,"citation_normalized_percentile":{"value":0.76417074,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1575","last_page":"1579"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9988999962806702,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.9200841188430786},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.8347147703170776},{"id":"https://openalex.org/keywords/ripple","display_name":"Ripple","score":0.7040061354637146},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6862295866012573},{"id":"https://openalex.org/keywords/carry","display_name":"Carry (investment)","score":0.6222887635231018},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5554820895195007},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.5552258491516113},{"id":"https://openalex.org/keywords/latency","display_name":"Latency (audio)","score":0.4561322331428528},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4458332359790802},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.32768869400024414},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.248221755027771},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.17218461632728577},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1531185805797577},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.11629101634025574}],"concepts":[{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.9200841188430786},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.8347147703170776},{"id":"https://openalex.org/C2779599953","wikidata":"https://www.wikidata.org/wiki/Q1776117","display_name":"Ripple","level":3,"score":0.7040061354637146},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6862295866012573},{"id":"https://openalex.org/C2776299755","wikidata":"https://www.wikidata.org/wiki/Q432449","display_name":"Carry (investment)","level":2,"score":0.6222887635231018},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5554820895195007},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.5552258491516113},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.4561322331428528},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4458332359790802},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.32768869400024414},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.248221755027771},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.17218461632728577},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1531185805797577},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.11629101634025574},{"id":"https://openalex.org/C10138342","wikidata":"https://www.wikidata.org/wiki/Q43015","display_name":"Finance","level":1,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/acssc.2016.7869644","is_oa":false,"landing_page_url":"https://doi.org/10.1109/acssc.2016.7869644","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2016 50th Asilomar Conference on Signals, Systems and Computers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.4099999964237213,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":28,"referenced_works":["https://openalex.org/W845285418","https://openalex.org/W1493445957","https://openalex.org/W1953553490","https://openalex.org/W1986623396","https://openalex.org/W2003942425","https://openalex.org/W2004782555","https://openalex.org/W2006221630","https://openalex.org/W2007898123","https://openalex.org/W2008901850","https://openalex.org/W2025674646","https://openalex.org/W2052293768","https://openalex.org/W2056229294","https://openalex.org/W2058878560","https://openalex.org/W2059888459","https://openalex.org/W2066280488","https://openalex.org/W2068896528","https://openalex.org/W2069207112","https://openalex.org/W2075496750","https://openalex.org/W2081729575","https://openalex.org/W2117164389","https://openalex.org/W2133557550","https://openalex.org/W2162651880","https://openalex.org/W2309171972","https://openalex.org/W2542473330","https://openalex.org/W2603064927","https://openalex.org/W6623449936","https://openalex.org/W6698428152","https://openalex.org/W6736339276"],"related_works":["https://openalex.org/W2075110663","https://openalex.org/W1910495841","https://openalex.org/W2033419648","https://openalex.org/W2109236388","https://openalex.org/W2059369867","https://openalex.org/W2157955791","https://openalex.org/W4225135417","https://openalex.org/W2127980940","https://openalex.org/W2095962490","https://openalex.org/W2057091512"],"abstract_inverted_index":{"This":[0],"work":[1,69],"presents":[2],"improved":[3],"implementations":[4],"of":[5],"memristor-based":[6],"ripple":[7,41],"carry":[8,42],"adders":[9],"using":[10],"three":[11],"different":[12],"approaches:":[13],"the":[14,45,57,65,78],"IMPLY":[15,39],"operation,":[16],"hybrid-CMOS":[17],"gates,":[18],"and":[19,33,50,73,87,93],"threshold":[20,82],"gates.":[21],"The":[22,37,60,81],"designs":[23],"are":[24],"optimized":[25],"by":[26,47,52,70],"performing":[27],"parallel":[28],"operations,":[29],"leveraging":[30],"computational":[31],"redundancies,":[32],"recognizing":[34],"Boolean":[35],"simplifications.":[36],"proposed":[38],"N-bit":[40],"adder":[43],"decreases":[44],"area":[46,66],"2N-1":[48],"components":[49],"latency":[51],"3N-1":[53],"as":[54],"compared":[55],"to":[56],"previous":[58],"state-of-the-art.":[59],"hybrid":[61],"approach":[62,84],"improves":[63],"upon":[64],"in":[67],"prior":[68],"4N":[71],"memristors":[72],"12N":[74],"MOSFETs":[75],"while":[76],"maintaining":[77],"same":[79],"delay.":[80],"gate":[83,91],"is":[85],"novel":[86],"requires":[88],"only":[89],"N+1":[90],"delays":[92],"7N":[94],"memristors.":[95]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2018,"cited_by_count":1},{"year":2017,"cited_by_count":3}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
