{"id":"https://openalex.org/W2292909929","doi":"https://doi.org/10.1109/acssc.2015.7421115","title":"Synchronization and delay estimation with sub-tick resolution","display_name":"Synchronization and delay estimation with sub-tick resolution","publication_year":2015,"publication_date":"2015-11-01","ids":{"openalex":"https://openalex.org/W2292909929","doi":"https://doi.org/10.1109/acssc.2015.7421115","mag":"2292909929"},"language":"en","primary_location":{"id":"doi:10.1109/acssc.2015.7421115","is_oa":false,"landing_page_url":"https://doi.org/10.1109/acssc.2015.7421115","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 49th Asilomar Conference on Signals, Systems and Computers","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5059345440","display_name":"Bernhard Etzlinger","orcid":"https://orcid.org/0000-0001-6717-1603"},"institutions":[{"id":"https://openalex.org/I121883995","display_name":"Johannes Kepler University of Linz","ror":"https://ror.org/052r2xn60","country_code":"AT","type":"education","lineage":["https://openalex.org/I121883995"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Bernhard Etzlinger","raw_affiliation_strings":["Johannes Kepler University, Linz, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Johannes Kepler University, Linz, Austria","institution_ids":["https://openalex.org/I121883995"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006332470","display_name":"Nino Palaoro","orcid":null},"institutions":[{"id":"https://openalex.org/I121883995","display_name":"Johannes Kepler University of Linz","ror":"https://ror.org/052r2xn60","country_code":"AT","type":"education","lineage":["https://openalex.org/I121883995"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Nino Palaoro","raw_affiliation_strings":["Johannes Kepler University, Linz, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Johannes Kepler University, Linz, Austria","institution_ids":["https://openalex.org/I121883995"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5013115524","display_name":"Andreas Springer","orcid":"https://orcid.org/0000-0001-8301-5184"},"institutions":[{"id":"https://openalex.org/I121883995","display_name":"Johannes Kepler University of Linz","ror":"https://ror.org/052r2xn60","country_code":"AT","type":"education","lineage":["https://openalex.org/I121883995"]}],"countries":["AT"],"is_corresponding":false,"raw_author_name":"Andreas Springer","raw_affiliation_strings":["Johannes Kepler University, Linz, Austria"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Johannes Kepler University, Linz, Austria","institution_ids":["https://openalex.org/I121883995"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I121883995"],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":2,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"62","issue":null,"first_page":"209","last_page":"213"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T12216","display_name":"Network Time Synchronization Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T12216","display_name":"Network Time Synchronization Technologies","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10772","display_name":"Distributed systems and fault tolerance","score":0.9890000224113464,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12004","display_name":"Advanced Frequency and Time Standards","score":0.9865000247955322,"subfield":{"id":"https://openalex.org/subfields/3107","display_name":"Atomic and Molecular Physics, and Optics"},"field":{"id":"https://openalex.org/fields/31","display_name":"Physics and Astronomy"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/digital-clock-manager","display_name":"Digital clock manager","score":0.8795158863067627},{"id":"https://openalex.org/keywords/clock-skew","display_name":"Clock skew","score":0.8737238645553589},{"id":"https://openalex.org/keywords/timing-failure","display_name":"Timing failure","score":0.8607389330863953},{"id":"https://openalex.org/keywords/clock-domain-crossing","display_name":"Clock domain crossing","score":0.85487961769104},{"id":"https://openalex.org/keywords/clock-drift","display_name":"Clock drift","score":0.799040675163269},{"id":"https://openalex.org/keywords/clock-synchronization","display_name":"Clock synchronization","score":0.7539264559745789},{"id":"https://openalex.org/keywords/self-clocking-signal","display_name":"Self-clocking signal","score":0.705673098564148},{"id":"https://openalex.org/keywords/timer","display_name":"Timer","score":0.6969617009162903},{"id":"https://openalex.org/keywords/vector-clock","display_name":"Vector clock","score":0.6851264238357544},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6598271727561951},{"id":"https://openalex.org/keywords/static-timing-analysis","display_name":"Static timing analysis","score":0.6111080050468445},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.5660508871078491},{"id":"https://openalex.org/keywords/synchronization","display_name":"Synchronization (alternating current)","score":0.5390220880508423},{"id":"https://openalex.org/keywords/clock-gating","display_name":"Clock gating","score":0.49898815155029297},{"id":"https://openalex.org/keywords/cpu-multiplier","display_name":"CPU multiplier","score":0.48213812708854675},{"id":"https://openalex.org/keywords/synchronous-circuit","display_name":"Synchronous circuit","score":0.4674219787120819},{"id":"https://openalex.org/keywords/propagation-delay","display_name":"Propagation delay","score":0.45826584100723267},{"id":"https://openalex.org/keywords/timestamp","display_name":"Timestamp","score":0.4278280735015869},{"id":"https://openalex.org/keywords/clock-signal","display_name":"Clock signal","score":0.415763795375824},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.2807650566101074},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.1683756709098816},{"id":"https://openalex.org/keywords/jitter","display_name":"Jitter","score":0.15422466397285461},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.1307820975780487},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1260581910610199}],"concepts":[{"id":"https://openalex.org/C113074038","wikidata":"https://www.wikidata.org/wiki/Q5276052","display_name":"Digital clock manager","level":5,"score":0.8795158863067627},{"id":"https://openalex.org/C60501442","wikidata":"https://www.wikidata.org/wiki/Q4382014","display_name":"Clock skew","level":4,"score":0.8737238645553589},{"id":"https://openalex.org/C104654189","wikidata":"https://www.wikidata.org/wiki/Q7806740","display_name":"Timing failure","level":5,"score":0.8607389330863953},{"id":"https://openalex.org/C127204226","wikidata":"https://www.wikidata.org/wiki/Q5134799","display_name":"Clock domain crossing","level":5,"score":0.85487961769104},{"id":"https://openalex.org/C155837451","wikidata":"https://www.wikidata.org/wiki/Q1069144","display_name":"Clock drift","level":5,"score":0.799040675163269},{"id":"https://openalex.org/C129891060","wikidata":"https://www.wikidata.org/wiki/Q1513059","display_name":"Clock synchronization","level":4,"score":0.7539264559745789},{"id":"https://openalex.org/C171051901","wikidata":"https://www.wikidata.org/wiki/Q2389679","display_name":"Self-clocking signal","level":5,"score":0.705673098564148},{"id":"https://openalex.org/C2776633867","wikidata":"https://www.wikidata.org/wiki/Q186612","display_name":"Timer","level":3,"score":0.6969617009162903},{"id":"https://openalex.org/C52563298","wikidata":"https://www.wikidata.org/wiki/Q1413349","display_name":"Vector clock","level":5,"score":0.6851264238357544},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6598271727561951},{"id":"https://openalex.org/C93682380","wikidata":"https://www.wikidata.org/wiki/Q2025226","display_name":"Static timing analysis","level":2,"score":0.6111080050468445},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.5660508871078491},{"id":"https://openalex.org/C2778562939","wikidata":"https://www.wikidata.org/wiki/Q1298791","display_name":"Synchronization (alternating current)","level":3,"score":0.5390220880508423},{"id":"https://openalex.org/C22716491","wikidata":"https://www.wikidata.org/wiki/Q590170","display_name":"Clock gating","level":5,"score":0.49898815155029297},{"id":"https://openalex.org/C125576049","wikidata":"https://www.wikidata.org/wiki/Q2246273","display_name":"CPU multiplier","level":5,"score":0.48213812708854675},{"id":"https://openalex.org/C42196554","wikidata":"https://www.wikidata.org/wiki/Q1186179","display_name":"Synchronous circuit","level":4,"score":0.4674219787120819},{"id":"https://openalex.org/C90806461","wikidata":"https://www.wikidata.org/wiki/Q1144416","display_name":"Propagation delay","level":2,"score":0.45826584100723267},{"id":"https://openalex.org/C113954288","wikidata":"https://www.wikidata.org/wiki/Q186885","display_name":"Timestamp","level":2,"score":0.4278280735015869},{"id":"https://openalex.org/C137059387","wikidata":"https://www.wikidata.org/wiki/Q426882","display_name":"Clock signal","level":3,"score":0.415763795375824},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.2807650566101074},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.1683756709098816},{"id":"https://openalex.org/C134652429","wikidata":"https://www.wikidata.org/wiki/Q1052698","display_name":"Jitter","level":2,"score":0.15422466397285461},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.1307820975780487},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1260581910610199},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.0},{"id":"https://openalex.org/C173018170","wikidata":"https://www.wikidata.org/wiki/Q165678","display_name":"Microcontroller","level":2,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/acssc.2015.7421115","is_oa":false,"landing_page_url":"https://doi.org/10.1109/acssc.2015.7421115","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2015 49th Asilomar Conference on Signals, Systems and Computers","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":15,"referenced_works":["https://openalex.org/W1900291378","https://openalex.org/W1974618482","https://openalex.org/W1988557369","https://openalex.org/W2003321974","https://openalex.org/W2027808429","https://openalex.org/W2043105656","https://openalex.org/W2046306310","https://openalex.org/W2081202978","https://openalex.org/W2100846830","https://openalex.org/W2107710215","https://openalex.org/W2116564397","https://openalex.org/W2170120409","https://openalex.org/W2171179450","https://openalex.org/W2963660532","https://openalex.org/W3104291464"],"related_works":["https://openalex.org/W2006392656","https://openalex.org/W1497331638","https://openalex.org/W4231008241","https://openalex.org/W2292909929","https://openalex.org/W2411759562","https://openalex.org/W1966845705","https://openalex.org/W2371965169","https://openalex.org/W2389820945","https://openalex.org/W2357497058","https://openalex.org/W3196221628"],"abstract_inverted_index":{"We":[0],"consider":[1],"the":[2,17,34,39,49,77,95],"problem":[3],"of":[4,10,41,45,63],"clock":[5,60,66,69,84,96,116,118,128,144],"synchronization":[6],"between":[7],"a":[8,46,54,82,102,124,134],"pair":[9],"nodes":[11],"using":[12],"round-trip":[13,107],"communication":[14],"where":[15,24],"only":[16],"initiating":[18],"node":[19],"collects":[20],"time":[21,26,31,108],"stamps,":[22],"and":[23,68,80,120],"no":[25],"stamps":[27,32],"are":[28,33],"exchanged.":[29],"These":[30],"current":[35],"timer":[36,50],"values":[37],"at":[38],"event":[40],"transmission":[42],"or":[43],"reception":[44],"signal.":[47],"Traditionally,":[48],"is":[51,87],"modeled":[52],"by":[53,89],"continuous":[55],"function,":[56],"i.e.":[57],"as":[58],"affine":[59],"in":[61,65],"case":[62],"asynchronism":[64],"skew":[67],"phase.":[70],"In":[71],"this":[72],"work":[73],"we":[74,132],"deviate":[75],"from":[76,91],"traditional":[78],"model":[79,97,105],"propose":[81],"discrete-valued":[83],"model,":[85],"which":[86,110],"motivated":[88],"observations":[90],"real":[92],"hardware.":[93,145],"Employing":[94],"allows":[98],"us":[99,112],"to":[100,113],"find":[101],"new":[103],"signaling":[104],"for":[106],"measurements,":[109],"enables":[111],"simultaneously":[114],"estimate":[115],"skew,":[117],"phase":[119],"propagation":[121],"delay":[122],"with":[123,142],"resolution":[125,141],"below":[126],"one":[127],"tick":[129],"period.":[130],"Hence,":[131],"set":[133],"first":[135],"step":[136],"towards":[137],"enabling":[138],"high":[139],"timing":[140],"limited":[143]},"counts_by_year":[{"year":2016,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}
