{"id":"https://openalex.org/W2927760635","doi":"https://doi.org/10.1109/acit.2018.8672698","title":"A Novel Implementation of Ternary Decoder Using CMOS DPL Binary Gates","display_name":"A Novel Implementation of Ternary Decoder Using CMOS DPL Binary Gates","publication_year":2018,"publication_date":"2018-11-01","ids":{"openalex":"https://openalex.org/W2927760635","doi":"https://doi.org/10.1109/acit.2018.8672698","mag":"2927760635"},"language":"en","primary_location":{"id":"doi:10.1109/acit.2018.8672698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/acit.2018.8672698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International Arab Conference on Information Technology (ACIT)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5039250502","display_name":"Ramzi A. Jaber","orcid":"https://orcid.org/0000-0003-0021-516X"},"institutions":[{"id":"https://openalex.org/I36314861","display_name":"Beirut Arab University","ror":"https://ror.org/02jya5567","country_code":"LB","type":"education","lineage":["https://openalex.org/I36314861"]}],"countries":["LB"],"is_corresponding":false,"raw_author_name":"Ramzi Jaber","raw_affiliation_strings":["Depart. of Electrical & Computer Eng., Beirut Arab University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Depart. of Electrical & Computer Eng., Beirut Arab University","institution_ids":["https://openalex.org/I36314861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5011038780","display_name":"Ahmad M. El\u2010Hajj","orcid":"https://orcid.org/0000-0002-5434-3821"},"institutions":[{"id":"https://openalex.org/I36314861","display_name":"Beirut Arab University","ror":"https://ror.org/02jya5567","country_code":"LB","type":"education","lineage":["https://openalex.org/I36314861"]}],"countries":["LB"],"is_corresponding":false,"raw_author_name":"Ahmad Elhajj","raw_affiliation_strings":["Depart. of Electrical & Computer Eng., Beirut Arab University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Depart. of Electrical & Computer Eng., Beirut Arab University","institution_ids":["https://openalex.org/I36314861"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5071418376","display_name":"Lina Nimri","orcid":null},"institutions":[{"id":"https://openalex.org/I160368002","display_name":"Lebanese University","ror":"https://ror.org/05x6qnc69","country_code":"LB","type":"education","lineage":["https://openalex.org/I160368002"]}],"countries":["LB"],"is_corresponding":false,"raw_author_name":"Lina Nimri","raw_affiliation_strings":["Depart. of Business Computer, Lebanese University, Beirut, Lebanon"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Depart. of Business Computer, Lebanese University, Beirut, Lebanon","institution_ids":["https://openalex.org/I160368002"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5101901055","display_name":"Ali Massoud Haidar","orcid":"https://orcid.org/0000-0001-8065-3658"},"institutions":[{"id":"https://openalex.org/I36314861","display_name":"Beirut Arab University","ror":"https://ror.org/02jya5567","country_code":"LB","type":"education","lineage":["https://openalex.org/I36314861"]}],"countries":["LB"],"is_corresponding":false,"raw_author_name":"Ali Haidar","raw_affiliation_strings":["Depart. of Electrical & Computer Eng., Beirut Arab University"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Depart. of Electrical & Computer Eng., Beirut Arab University","institution_ids":["https://openalex.org/I36314861"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":null,"has_fulltext":false,"cited_by_count":12,"citation_normalized_percentile":null,"cited_by_percentile_year":null,"biblio":{"volume":"c 26","issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.998199999332428,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9973999857902527,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9962999820709229,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6532669067382812},{"id":"https://openalex.org/keywords/ternary-operation","display_name":"Ternary operation","score":0.6469330191612244},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6159862875938416},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.5731778144836426},{"id":"https://openalex.org/keywords/logic-family","display_name":"Logic family","score":0.5657619833946228},{"id":"https://openalex.org/keywords/multiplexer","display_name":"Multiplexer","score":0.5392524003982544},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5077248811721802},{"id":"https://openalex.org/keywords/pass-transistor-logic","display_name":"Pass transistor logic","score":0.4910602569580078},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.47566670179367065},{"id":"https://openalex.org/keywords/logic-synthesis","display_name":"Logic synthesis","score":0.46215537190437317},{"id":"https://openalex.org/keywords/digital-electronics","display_name":"Digital electronics","score":0.4234282374382019},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.41757136583328247},{"id":"https://openalex.org/keywords/binary-number","display_name":"Binary number","score":0.4130341112613678},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.33999261260032654},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.3053215742111206},{"id":"https://openalex.org/keywords/arithmetic","display_name":"Arithmetic","score":0.2941979467868805},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.21898922324180603},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.19008496403694153},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.16704076528549194},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.1625945270061493},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.13052701950073242},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.05724421143531799}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6532669067382812},{"id":"https://openalex.org/C64452783","wikidata":"https://www.wikidata.org/wiki/Q1524945","display_name":"Ternary operation","level":2,"score":0.6469330191612244},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6159862875938416},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.5731778144836426},{"id":"https://openalex.org/C162454741","wikidata":"https://www.wikidata.org/wiki/Q173359","display_name":"Logic family","level":4,"score":0.5657619833946228},{"id":"https://openalex.org/C70970002","wikidata":"https://www.wikidata.org/wiki/Q189434","display_name":"Multiplexer","level":3,"score":0.5392524003982544},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5077248811721802},{"id":"https://openalex.org/C198521697","wikidata":"https://www.wikidata.org/wiki/Q7142438","display_name":"Pass transistor logic","level":4,"score":0.4910602569580078},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.47566670179367065},{"id":"https://openalex.org/C157922185","wikidata":"https://www.wikidata.org/wiki/Q173198","display_name":"Logic synthesis","level":3,"score":0.46215537190437317},{"id":"https://openalex.org/C81843906","wikidata":"https://www.wikidata.org/wiki/Q173156","display_name":"Digital electronics","level":3,"score":0.4234282374382019},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.41757136583328247},{"id":"https://openalex.org/C48372109","wikidata":"https://www.wikidata.org/wiki/Q3913","display_name":"Binary number","level":2,"score":0.4130341112613678},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.33999261260032654},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.3053215742111206},{"id":"https://openalex.org/C94375191","wikidata":"https://www.wikidata.org/wiki/Q11205","display_name":"Arithmetic","level":1,"score":0.2941979467868805},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.21898922324180603},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.19008496403694153},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.16704076528549194},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.1625945270061493},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.13052701950073242},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.05724421143531799},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/acit.2018.8672698","is_oa":false,"landing_page_url":"https://doi.org/10.1109/acit.2018.8672698","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2018 International Arab Conference on Information Technology (ACIT)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":13,"referenced_works":["https://openalex.org/W40265213","https://openalex.org/W2043294591","https://openalex.org/W2047582595","https://openalex.org/W2068871056","https://openalex.org/W2077186783","https://openalex.org/W2119208394","https://openalex.org/W2152216926","https://openalex.org/W2169245181","https://openalex.org/W2175588594","https://openalex.org/W2334604828","https://openalex.org/W2602330298","https://openalex.org/W2808360896","https://openalex.org/W2884028000"],"related_works":["https://openalex.org/W2098419840","https://openalex.org/W6024065","https://openalex.org/W1980349267","https://openalex.org/W2526300902","https://openalex.org/W24944685","https://openalex.org/W3010731809","https://openalex.org/W659242671","https://openalex.org/W1553855433","https://openalex.org/W2140610743","https://openalex.org/W2766377030"],"abstract_inverted_index":{"This":[0],"paper":[1],"proposes":[2],"a":[3],"novel":[4],"implementation":[5],"of":[6,25,80,85,88],"Ternary":[7,39,60,64,67],"Decoder":[8,40],"using":[9],"CMOS":[10,20],"DPL":[11],"(Double":[12],"Pass":[13],"Logic)":[14],"Binary":[15],"logic":[16],"gates,":[17],"in":[18,45,83],"digital":[19],"technology.":[21],"The":[22,37,48,74],"physical":[23],"design":[24],"the":[26,54,78,81,94],"circuits":[27],"is":[28],"simulated":[29],"and":[30,72],"tested":[31],"with":[32],"Micro-Cap":[33],"10":[34],"SPICE":[35],"simulator.":[36],"Proposed":[38,49],"circuit":[41,51,56],"can":[42],"be":[43,53],"used":[44],"VLSI":[46],"design.":[47],"decoder":[50],"will":[52],"basic":[55],"to":[57,93],"create":[58],"other":[59],"Logic":[61,65],"Circuits":[62],"like":[63],"Gates,":[66],"Memory,":[68],"Adder,":[69],"Multiplier,":[70],"Multiplexer,":[71],"others.":[73],"simulation":[75],"results":[76],"demonstrate":[77],"merits":[79],"approach":[82],"terms":[84],"reduced":[86],"number":[87],"transistors":[89],"by":[90],"25%":[91],"compared":[92],"existing":[95],"ternary":[96],"decoder.":[97]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2023,"cited_by_count":2},{"year":2022,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":4},{"year":2019,"cited_by_count":2}],"updated_date":"2026-07-14T23:27:15.235271","created_date":"2025-10-10T00:00:00"}