{"id":"https://openalex.org/W7160211694","doi":"https://doi.org/10.1109/access.2026.3688985","title":"An Analysis of Memristive Stateful Logics Under Various Operational Conditions","display_name":"An Analysis of Memristive Stateful Logics Under Various Operational Conditions","publication_year":2026,"publication_date":"2026-01-01","ids":{"openalex":"https://openalex.org/W7160211694","doi":"https://doi.org/10.1109/access.2026.3688985"},"language":"en","primary_location":{"id":"doi:10.1109/access.2026.3688985","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2026.3688985","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1109/access.2026.3688985","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5023734432","display_name":"Roya Rahimi Disfani","orcid":"https://orcid.org/0009-0009-0439-6413"},"institutions":[{"id":"https://openalex.org/I84248293","display_name":"Babol Noshirvani University of Technology","ror":"https://ror.org/02zc85170","country_code":"IR","type":"education","lineage":["https://openalex.org/I84248293"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Roya Rahimi Disfani","raw_affiliation_strings":["Faculty of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran"],"raw_orcid":"https://orcid.org/0009-0009-0439-6413","affiliations":[{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran","institution_ids":["https://openalex.org/I84248293"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5067288450","display_name":"Mojtaba Valinataj","orcid":"https://orcid.org/0000-0002-6536-373X"},"institutions":[{"id":"https://openalex.org/I84248293","display_name":"Babol Noshirvani University of Technology","ror":"https://ror.org/02zc85170","country_code":"IR","type":"education","lineage":["https://openalex.org/I84248293"]}],"countries":["IR"],"is_corresponding":false,"raw_author_name":"Mojtaba Valinataj","raw_affiliation_strings":["Faculty of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran"],"raw_orcid":"https://orcid.org/0000-0002-6536-373X","affiliations":[{"raw_affiliation_string":"Faculty of Electrical and Computer Engineering, Babol Noshirvani University of Technology, Babol, Iran","institution_ids":["https://openalex.org/I84248293"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050080301","display_name":"Nima TaheriNejad","orcid":"https://orcid.org/0000-0002-1295-0332"},"institutions":[{"id":"https://openalex.org/I223822909","display_name":"Heidelberg University","ror":"https://ror.org/038t36y30","country_code":"DE","type":"education","lineage":["https://openalex.org/I223822909"]}],"countries":["DE"],"is_corresponding":false,"raw_author_name":"Nima TaheriNejad","raw_affiliation_strings":["Heidelberg University, Heidelberg, Germany"],"raw_orcid":"https://orcid.org/0000-0002-1295-0332","affiliations":[{"raw_affiliation_string":"Heidelberg University, Heidelberg, Germany","institution_ids":["https://openalex.org/I223822909"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":0.0,"has_fulltext":false,"cited_by_count":0,"citation_normalized_percentile":{"value":0.4689633,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":null,"biblio":{"volume":"14","issue":null,"first_page":"65641","last_page":"65653"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.7731000185012817,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.7731000185012817,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12611","display_name":"Neural Networks and Reservoir Computing","score":0.031199999153614044,"subfield":{"id":"https://openalex.org/subfields/1702","display_name":"Artificial Intelligence"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11347","display_name":"Neural Networks Stability and Synchronization","score":0.01769999973475933,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/stateful-firewall","display_name":"Stateful firewall","score":0.7838000059127808},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.26260000467300415},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.2531999945640564},{"id":"https://openalex.org/keywords/memristor","display_name":"Memristor","score":0.23960000276565552},{"id":"https://openalex.org/keywords/boolean-function","display_name":"Boolean function","score":0.23240000009536743}],"concepts":[{"id":"https://openalex.org/C22927095","wikidata":"https://www.wikidata.org/wiki/Q1784206","display_name":"Stateful firewall","level":3,"score":0.7838000059127808},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7310000061988831},{"id":"https://openalex.org/C80444323","wikidata":"https://www.wikidata.org/wiki/Q2878974","display_name":"Theoretical computer science","level":1,"score":0.33250001072883606},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.28519999980926514},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.26260000467300415},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.2531999945640564},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.24120000004768372},{"id":"https://openalex.org/C150072547","wikidata":"https://www.wikidata.org/wiki/Q212923","display_name":"Memristor","level":2,"score":0.23960000276565552},{"id":"https://openalex.org/C187455244","wikidata":"https://www.wikidata.org/wiki/Q942353","display_name":"Boolean function","level":2,"score":0.23240000009536743},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.23010000586509705}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2026.3688985","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2026.3688985","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:3e0363c160444ea7b7b1e0e64d5ebaaa","is_oa":true,"landing_page_url":"https://doaj.org/article/3e0363c160444ea7b7b1e0e64d5ebaaa","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 14, Pp 65641-65653 (2026)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2026.3688985","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2026.3688985","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":[],"abstract_inverted_index":{"Memristive":[0,28],"technology":[1],"is":[2,202],"one":[3],"of":[4,51,71,92,151,189,198,224],"the":[5,18,47,130,149,181,187,196,222],"most":[6],"promising":[7],"emerging":[8],"technologies":[9],"for":[10,20,138,169,221],"In-Memory":[11],"Computing":[12],"(IMC),":[13],"which":[14],"aims":[15],"to":[16,39,204],"reduce":[17],"need":[19],"data":[21],"movement":[22],"between":[23],"memory":[24,44],"and":[25,49,64,66,106,108,117,133,153,160,167,178,185,191,217,226],"processing":[26],"units.":[27],"stateful":[29,73,96],"logics":[30],"further":[31],"extend":[32],"this":[33,83,85],"paradigm":[34],"by":[35,58],"enabling":[36],"logic":[37,53,74,122,183,200],"operations":[38,54,201],"be":[40],"performed":[41],"directly":[42],"within":[43,141],"arrays.":[45],"However,":[46],"correctness":[48],"reliability":[50,197],"such":[52],"are":[55],"strongly":[56],"affected":[57],"memristive":[59,95,115,228],"non-idealities,":[60],"including":[61],"device":[62,152],"variations":[63,156],"leakage,":[65],"a":[67,88,125],"systematic":[68],"comparative":[69],"evaluation":[70],"different":[72],"families":[75],"under":[76],"these":[77],"conditions":[78],"remains":[79],"open.":[80],"To":[81,112],"lower":[82],"gap,":[84],"paper":[86],"presents":[87],"comprehensive":[89],"simulation-based":[90],"analysis":[91],"three":[93,182],"key":[94],"logics,":[97],"Material":[98],"Implication":[99],"(IMPLY),":[100],"Three":[101],"Memristors":[102],"Stateful":[103],"Logic":[104,110],"(TMSL)":[105],"Fast":[107],"Energy-efficient":[109],"(FELIX).":[111],"accurately":[113],"capture":[114],"non-idealities":[116],"reflect":[118],"their":[119],"impact":[120,150],"on":[121,157],"behavior":[123],"in":[124],"realistic":[126],"setting,":[127],"we":[128],"employ":[129],"BEhavioral":[131],"Leakage":[132],"IntEr-cycle":[134],"Variability":[135],"Emulator":[136],"model":[137],"ReRAM":[139],"(BELIEVER)":[140],"an":[142],"LTspice-based":[143],"Monte":[144],"Carlo":[145],"framework.":[146],"We":[147],"investigate":[148],"configuration":[154],"parameter":[155],"output":[158],"correctness,":[159],"also":[161],"consider":[162],"power":[163],"consumption,":[164],"energy":[165],"efficiency,":[166],"delay":[168],"optimal":[170,192],"settings.":[171],"The":[172],"results":[173],"reveal":[174],"distinct":[175],"robustness":[176],"characteristics":[177],"trade-offs":[179],"among":[180],"families,":[184],"enable":[186],"identification":[188],"reliable":[190],"operational":[193],"conditions.":[194],"Furthermore,":[195],"sequential":[199],"analyzed":[203],"assess":[205],"scalability":[206],"toward":[207],"larger":[208],"circuit":[209],"designs.":[210],"These":[211],"findings":[212],"establish":[213],"critical":[214],"design":[215],"margins":[216],"provide":[218],"practical":[219],"guidelines":[220],"development":[223],"robust":[225],"variation-aware":[227],"IMC":[229],"systems.":[230]},"counts_by_year":[],"updated_date":"2026-05-06T06:03:25.996018","created_date":"2026-05-05T00:00:00"}