{"id":"https://openalex.org/W4391620829","doi":"https://doi.org/10.1109/access.2024.3363913","title":"Modeling and Design of Dual-Purpose MIV in Monolithic 3D IC","display_name":"Modeling and Design of Dual-Purpose MIV in Monolithic 3D IC","publication_year":2024,"publication_date":"2024-01-01","ids":{"openalex":"https://openalex.org/W4391620829","doi":"https://doi.org/10.1109/access.2024.3363913"},"language":"en","primary_location":{"id":"doi:10.1109/access.2024.3363913","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2024.3363913","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10424972.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10424972.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5079887499","display_name":"Madhava Sarma Vemuri","orcid":"https://orcid.org/0000-0002-8883-7790"},"institutions":[{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Madhava Sarma Vemuri","raw_affiliation_strings":["Department of Electrical and Computer Engineering, North Dakota State University, Fargo, ND, USA","Department of Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota, USA"],"raw_orcid":"https://orcid.org/0000-0002-8883-7790","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Dakota State University, Fargo, ND, USA","institution_ids":["https://openalex.org/I57328836"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota, USA","institution_ids":["https://openalex.org/I57328836"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5076972812","display_name":"Umamaheswara Rao Tida","orcid":"https://orcid.org/0000-0002-9724-1585"},"institutions":[{"id":"https://openalex.org/I57328836","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22","country_code":"US","type":"education","lineage":["https://openalex.org/I57328836"]}],"countries":["US"],"is_corresponding":false,"raw_author_name":"Umamaheswara Rao Tida","raw_affiliation_strings":["Department of Electrical and Computer Engineering, North Dakota State University, Fargo, ND, USA","Department of Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota, USA"],"raw_orcid":"https://orcid.org/0000-0002-9724-1585","affiliations":[{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Dakota State University, Fargo, ND, USA","institution_ids":["https://openalex.org/I57328836"]},{"raw_affiliation_string":"Department of Electrical and Computer Engineering, North Dakota State University, Fargo, North Dakota, USA","institution_ids":["https://openalex.org/I57328836"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":1,"corresponding_author_ids":[],"corresponding_institution_ids":["https://openalex.org/I57328836"],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":0.8654,"has_fulltext":true,"cited_by_count":5,"citation_normalized_percentile":{"value":0.71371221,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":94,"max":98},"biblio":{"volume":"12","issue":null,"first_page":"23066","last_page":"23080"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9980999827384949,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10623","display_name":"Thin-Film Transistor Technologies","score":0.9980000257492065,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5644375085830688},{"id":"https://openalex.org/keywords/spice","display_name":"Spice","score":0.5422095060348511},{"id":"https://openalex.org/keywords/footprint","display_name":"Footprint","score":0.5007872581481934},{"id":"https://openalex.org/keywords/overhead","display_name":"Overhead (engineering)","score":0.4967802166938782},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.48033204674720764},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.44468605518341064},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.44154155254364014},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.43032291531562805},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.4284846782684326},{"id":"https://openalex.org/keywords/integrated-circuit","display_name":"Integrated circuit","score":0.4241049587726593},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2764255106449127},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23227733373641968},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.16380983591079712},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.1331237554550171}],"concepts":[{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5644375085830688},{"id":"https://openalex.org/C2780077345","wikidata":"https://www.wikidata.org/wiki/Q16891888","display_name":"Spice","level":2,"score":0.5422095060348511},{"id":"https://openalex.org/C132943942","wikidata":"https://www.wikidata.org/wiki/Q2562511","display_name":"Footprint","level":2,"score":0.5007872581481934},{"id":"https://openalex.org/C2779960059","wikidata":"https://www.wikidata.org/wiki/Q7113681","display_name":"Overhead (engineering)","level":2,"score":0.4967802166938782},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.48033204674720764},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.44468605518341064},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.44154155254364014},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.43032291531562805},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.4284846782684326},{"id":"https://openalex.org/C530198007","wikidata":"https://www.wikidata.org/wiki/Q80831","display_name":"Integrated circuit","level":2,"score":0.4241049587726593},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2764255106449127},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23227733373641968},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.16380983591079712},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.1331237554550171},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2024.3363913","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2024.3363913","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10424972.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:892d4b009e8c4fcf90870670915c78d3","is_oa":true,"landing_page_url":"https://doaj.org/article/892d4b009e8c4fcf90870670915c78d3","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 12, Pp 23066-23080 (2024)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2024.3363913","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2024.3363913","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10424972.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.4699999988079071,"display_name":"Industry, innovation and infrastructure","id":"https://metadata.un.org/sdg/9"}],"awards":[{"id":"https://openalex.org/G7535710703","display_name":"CRII: SHF: Enabling Metal Inter-Layer Via Device Utilization for On-chip Memory in Monolithic Three-Dimensional Integrated Circuits","funder_award_id":"2105164","funder_id":"https://openalex.org/F4320306076","funder_display_name":"National Science Foundation"}],"funders":[{"id":"https://openalex.org/F4320306076","display_name":"National Science Foundation","ror":"https://ror.org/021nxhr62"},{"id":"https://openalex.org/F4320309013","display_name":"North Dakota State University","ror":"https://ror.org/05h1bnb22"},{"id":"https://openalex.org/F4320310256","display_name":"University of Cincinnati","ror":"https://ror.org/01e3m7079"},{"id":"https://openalex.org/F4320310260","display_name":"University of Notre Dame","ror":"https://ror.org/00mkhxb43"},{"id":"https://openalex.org/F4320312855","display_name":"Missouri University of Science and Technology","ror":"https://ror.org/00scwqd12"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4391620829.pdf","grobid_xml":"https://content.openalex.org/works/W4391620829.grobid-xml"},"referenced_works_count":29,"referenced_works":["https://openalex.org/W1969483737","https://openalex.org/W1972638602","https://openalex.org/W1976151090","https://openalex.org/W1983868989","https://openalex.org/W1984850493","https://openalex.org/W1999894889","https://openalex.org/W2091487568","https://openalex.org/W2093502879","https://openalex.org/W2098107502","https://openalex.org/W2103966614","https://openalex.org/W2112890389","https://openalex.org/W2157629140","https://openalex.org/W2166803207","https://openalex.org/W2481508967","https://openalex.org/W2510950183","https://openalex.org/W2579431025","https://openalex.org/W2745285691","https://openalex.org/W2905199518","https://openalex.org/W2919641936","https://openalex.org/W2954116083","https://openalex.org/W2955393539","https://openalex.org/W2976243136","https://openalex.org/W2985830373","https://openalex.org/W3036520934","https://openalex.org/W3083057417","https://openalex.org/W3083524336","https://openalex.org/W3196965653","https://openalex.org/W4237278439","https://openalex.org/W4377969844"],"related_works":["https://openalex.org/W2204879205","https://openalex.org/W2096437374","https://openalex.org/W1943174035","https://openalex.org/W1928481607","https://openalex.org/W3135165657","https://openalex.org/W1485582195","https://openalex.org/W57337972","https://openalex.org/W2313216219","https://openalex.org/W1561306903","https://openalex.org/W2109731446"],"abstract_inverted_index":{"Transistor-level":[0],"monolithic":[1],"three-dimensional":[2],"integrated":[3],"circuit":[4],"(M3D-IC)":[5],"technology":[6],"potential":[7],"is":[8,53,63],"compromised":[9],"with":[10,77,92],"the":[11,46,72,78,84,93],"silicon":[12],"footprint":[13],"overhead":[14],"caused":[15],"by":[16,87],"metal":[17],"inter-layer":[18],"via":[19],"(MIV).":[20],"To":[21],"address":[22],"this":[23,66],"issue,":[24],"we":[25],"present":[26],"a":[27,56],"dual-purpose":[28],"MIV-device":[29],"utilization":[30,80,86],"where":[31],"MIV":[32],"serves":[33],"two":[34],"purposes:":[35],"1.":[36],"interconnect":[37],"and":[38,51,55],"2.":[39],"device":[40],"terminal.":[41],"A":[42],"detailed":[43],"study":[44],"of":[45,81],"proposed":[47],"MIV-devices":[48,82],"specifically":[49],"MIV-capacitor":[50],"MIV-transistor":[52],"performed":[54],"strategy":[57],"to":[58,89],"extract":[59],"level-3":[60],"Spice":[61],"models":[62],"presented":[64],"in":[65,97],"paper.":[67],"Simulation":[68],"results":[69],"suggest":[70],"that":[71],"basic":[73],"logic":[74],"gates":[75],"designed":[76],"opportunistic":[79],"reduce":[83],"substrate":[85],"up":[88],"22%":[90],"compared":[91],"conventional":[94],"transistor-level":[95],"implementation":[96],"M3D-IC":[98],"technology.":[99]},"counts_by_year":[{"year":2026,"cited_by_count":1},{"year":2024,"cited_by_count":4}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}