{"id":"https://openalex.org/W4390494399","doi":"https://doi.org/10.1109/access.2023.3349244","title":"Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications","display_name":"Rail to Rail ICMR and High Performance ULV Standard-Cell-Based Comparator for Biomedical and IoT Applications","publication_year":2024,"publication_date":"2024-01-01","ids":{"openalex":"https://openalex.org/W4390494399","doi":"https://doi.org/10.1109/access.2023.3349244"},"language":"en","primary_location":{"id":"doi:10.1109/access.2023.3349244","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2023.3349244","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10379626.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10379626.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5016342533","display_name":"Riccardo Della Sala","orcid":"https://orcid.org/0000-0001-9990-4875"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Riccardo Della Sala","raw_affiliation_strings":["DIET, Universitã degli Studi di Roma “La Sapienza,”, Rome, Italy"],"raw_orcid":"https://orcid.org/0000-0001-9990-4875","affiliations":[{"raw_affiliation_string":"DIET, Universitã degli Studi di Roma “La Sapienza,”, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030782483","display_name":"Francesco Centurelli","orcid":"https://orcid.org/0000-0003-3880-2546"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Francesco Centurelli","raw_affiliation_strings":["DIET, Universitã degli Studi di Roma “La Sapienza,”, Rome, Italy"],"raw_orcid":"https://orcid.org/0000-0003-3880-2546","affiliations":[{"raw_affiliation_string":"DIET, Universitã degli Studi di Roma “La Sapienza,”, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5010336494","display_name":"Giuseppe Scotti","orcid":"https://orcid.org/0000-0002-5650-8212"},"institutions":[{"id":"https://openalex.org/I861853513","display_name":"Sapienza University of Rome","ror":"https://ror.org/02be6w209","country_code":"IT","type":"education","lineage":["https://openalex.org/I861853513"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Giuseppe Scotti","raw_affiliation_strings":["DIET, Universitã degli Studi di Roma “La Sapienza,”, Rome, Italy"],"raw_orcid":"https://orcid.org/0000-0002-5650-8212","affiliations":[{"raw_affiliation_string":"DIET, Universitã degli Studi di Roma “La Sapienza,”, Rome, Italy","institution_ids":["https://openalex.org/I861853513"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5044422028","display_name":"G. Palumbo","orcid":"https://orcid.org/0000-0002-8011-8660"},"institutions":[{"id":"https://openalex.org/I39063666","display_name":"University of Catania","ror":"https://ror.org/03a64bh57","country_code":"IT","type":"education","lineage":["https://openalex.org/I39063666"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Gaetano Palumbo","raw_affiliation_strings":["DIEEI, Universitã degli Studi di Catania, Catania, Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"DIEEI, Universitã degli Studi di Catania, Catania, Italy","institution_ids":["https://openalex.org/I39063666"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":3.4872,"has_fulltext":true,"cited_by_count":23,"citation_normalized_percentile":{"value":0.93062105,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":97,"max":99},"biblio":{"volume":"12","issue":null,"first_page":"4642","last_page":"4659"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11601","display_name":"Neuroscience and Neural Engineering","score":0.9986000061035156,"subfield":{"id":"https://openalex.org/subfields/2804","display_name":"Cellular and Molecular Neuroscience"},"field":{"id":"https://openalex.org/fields/28","display_name":"Neuroscience"},"domain":{"id":"https://openalex.org/domains/1","display_name":"Life Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/comparator","display_name":"Comparator","score":0.9257342219352722},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6489444971084595},{"id":"https://openalex.org/keywords/robustness","display_name":"Robustness (evolution)","score":0.6131155490875244},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.5696422457695007},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5647209882736206},{"id":"https://openalex.org/keywords/common-mode-signal","display_name":"Common-mode signal","score":0.5028893351554871},{"id":"https://openalex.org/keywords/node","display_name":"Node (physics)","score":0.4713570475578308},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.45610055327415466},{"id":"https://openalex.org/keywords/monte-carlo-method","display_name":"Monte Carlo method","score":0.4326223134994507},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.418592244386673},{"id":"https://openalex.org/keywords/logic-gate","display_name":"Logic gate","score":0.41765347123146057},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.40463772416114807},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1957775056362152},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.14769381284713745},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.14652547240257263},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.1303006410598755}],"concepts":[{"id":"https://openalex.org/C155745195","wikidata":"https://www.wikidata.org/wiki/Q1164179","display_name":"Comparator","level":3,"score":0.9257342219352722},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6489444971084595},{"id":"https://openalex.org/C63479239","wikidata":"https://www.wikidata.org/wiki/Q7353546","display_name":"Robustness (evolution)","level":3,"score":0.6131155490875244},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.5696422457695007},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5647209882736206},{"id":"https://openalex.org/C189714311","wikidata":"https://www.wikidata.org/wiki/Q1530371","display_name":"Common-mode signal","level":4,"score":0.5028893351554871},{"id":"https://openalex.org/C62611344","wikidata":"https://www.wikidata.org/wiki/Q1062658","display_name":"Node (physics)","level":2,"score":0.4713570475578308},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.45610055327415466},{"id":"https://openalex.org/C19499675","wikidata":"https://www.wikidata.org/wiki/Q232207","display_name":"Monte Carlo method","level":2,"score":0.4326223134994507},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.418592244386673},{"id":"https://openalex.org/C131017901","wikidata":"https://www.wikidata.org/wiki/Q170451","display_name":"Logic gate","level":2,"score":0.41765347123146057},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.40463772416114807},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1957775056362152},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.14769381284713745},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.14652547240257263},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.1303006410598755},{"id":"https://openalex.org/C185592680","wikidata":"https://www.wikidata.org/wiki/Q2329","display_name":"Chemistry","level":0,"score":0.0},{"id":"https://openalex.org/C13412647","wikidata":"https://www.wikidata.org/wiki/Q174948","display_name":"Analog signal","level":3,"score":0.0},{"id":"https://openalex.org/C66938386","wikidata":"https://www.wikidata.org/wiki/Q633538","display_name":"Structural engineering","level":1,"score":0.0},{"id":"https://openalex.org/C55493867","wikidata":"https://www.wikidata.org/wiki/Q7094","display_name":"Biochemistry","level":1,"score":0.0},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.0},{"id":"https://openalex.org/C105795698","wikidata":"https://www.wikidata.org/wiki/Q12483","display_name":"Statistics","level":1,"score":0.0},{"id":"https://openalex.org/C104317684","wikidata":"https://www.wikidata.org/wiki/Q7187","display_name":"Gene","level":2,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/access.2023.3349244","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2023.3349244","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10379626.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:iris.uniroma1.it:11573/1700700","is_oa":true,"landing_page_url":"https://hdl.handle.net/11573/1700700","pdf_url":"https://iris.uniroma1.it/bitstream/11573/1700700/1/DellaSala_Rail-to-Rail%20_2024.pdf","source":{"id":"https://openalex.org/S4377196107","display_name":"IRIS Research product catalog (Sapienza University of Rome)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":null,"raw_type":"info:eu-repo/semantics/article"},{"id":"pmh:oai:doaj.org/article:0e94d950f23c4ecb8b82b5d76183e8bd","is_oa":true,"landing_page_url":"https://doaj.org/article/0e94d950f23c4ecb8b82b5d76183e8bd","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 12, Pp 4642-4659 (2024)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2023.3349244","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2023.3349244","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/10379626.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.8600000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4390494399.pdf","grobid_xml":"https://content.openalex.org/works/W4390494399.grobid-xml"},"referenced_works_count":55,"referenced_works":["https://openalex.org/W1933280719","https://openalex.org/W1968632892","https://openalex.org/W1983329349","https://openalex.org/W1983740965","https://openalex.org/W1998894515","https://openalex.org/W2008917039","https://openalex.org/W2011344406","https://openalex.org/W2013468174","https://openalex.org/W2018896644","https://openalex.org/W2020542336","https://openalex.org/W2059728547","https://openalex.org/W2076654948","https://openalex.org/W2085745551","https://openalex.org/W2105267783","https://openalex.org/W2105430742","https://openalex.org/W2133759192","https://openalex.org/W2145699440","https://openalex.org/W2170280734","https://openalex.org/W2171912651","https://openalex.org/W2175322436","https://openalex.org/W2508772639","https://openalex.org/W2736090201","https://openalex.org/W2792295266","https://openalex.org/W2800836468","https://openalex.org/W2802784984","https://openalex.org/W2921716175","https://openalex.org/W2943848730","https://openalex.org/W2973091282","https://openalex.org/W2983709821","https://openalex.org/W3001307815","https://openalex.org/W3002233790","https://openalex.org/W3002619823","https://openalex.org/W3013689876","https://openalex.org/W3028126360","https://openalex.org/W3039999009","https://openalex.org/W3088896720","https://openalex.org/W3110546428","https://openalex.org/W3131061951","https://openalex.org/W3180927816","https://openalex.org/W3187001051","https://openalex.org/W3200146763","https://openalex.org/W4223976365","https://openalex.org/W4225886576","https://openalex.org/W4226119898","https://openalex.org/W4229065898","https://openalex.org/W4291653022","https://openalex.org/W4295956913","https://openalex.org/W4367310901","https://openalex.org/W4379620534","https://openalex.org/W4381273976","https://openalex.org/W4382396027","https://openalex.org/W4382541830","https://openalex.org/W4385977946","https://openalex.org/W4386124233","https://openalex.org/W6773037974"],"related_works":["https://openalex.org/W2034349229","https://openalex.org/W4366783034","https://openalex.org/W1972415042","https://openalex.org/W4313221225","https://openalex.org/W2150642609","https://openalex.org/W2005410346","https://openalex.org/W4306816370","https://openalex.org/W2548857153","https://openalex.org/W4385080071","https://openalex.org/W2588941787"],"abstract_inverted_index":{"In":[0],"this":[1],"paper":[2],"a":[3,98],"novel":[4],"ultra-low":[5],"voltage":[6,100],"(ULV)":[7],"standard-cell-based":[8,150],"comparator":[9],"which":[10],"provides":[11],"rail-to-rail":[12],"input":[13],"common-mode":[14],"range":[15],"(ICMR)":[16],"is":[17,33,53],"presented.":[18],"The":[19,69,107],"topology,":[20],"unlike":[21],"the":[22,25,57,62,66,113,116,127,133,137,145,148,153,158],"others":[23,149],"in":[24,152],"literature,":[26],"uses":[27],"only":[28,111],"2-inputs":[29],"NAND":[30],"gates":[31],"and":[32,60,80,93,104,136,162],"able":[34],"to":[35,55],"operate":[36],"with":[37],"supply":[38,99],"voltages":[39],"as":[40,42],"low":[41],"0.15V.":[43],"A":[44],"detailed":[45],"theoretical":[46],"analysis":[47,79],"based":[48],"on":[49],"transistor":[50],"level":[51],"modeling":[52],"provided":[54],"explain":[56],"operating":[58],"principle":[59],"highlight":[61],"performance":[63],"advantages":[64],"of":[65,101,115,147],"proposed":[67,117],"comparator.":[68],"circuit":[70],"has":[71],"been":[72],"tested":[73],"through":[74],"several":[75],"simulations,":[76],"including":[77],"corner":[78],"Monte":[81],"Carlo":[82],"runs,":[83],"by":[84],"using":[85],"three":[86],"different":[87],"technologies:":[88],"180":[89],"nm,":[90],"130":[91],"nm":[92,95],"28":[94],"for":[96,126],"both":[97],"0.3":[102],"V":[103],"0.15":[105],"V.":[106],"results":[108],"found":[109],"not":[110],"confirm":[112],"robustness":[114],"comparator,":[118],"but":[119],"also":[120,157],"demonstrate":[121],"very":[122],"advantageous":[123],"performances.":[124],"Indeed,":[125],"same":[128],"technology":[129],"node":[130],"it":[131],"exhibits":[132,156],"highest":[134],"speed":[135],"lowest":[138,159],"EDP":[139],"(about":[140],"ten":[141],"times":[142],"lower":[143],"than":[144],"one":[146],"comparators":[151],"literature).":[154],"It":[155],"power":[160],"consumption":[161],"silicon":[163],"area.":[164]},"counts_by_year":[{"year":2026,"cited_by_count":2},{"year":2025,"cited_by_count":8},{"year":2024,"cited_by_count":13}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}