{"id":"https://openalex.org/W4312284885","doi":"https://doi.org/10.1109/access.2022.3224924","title":"Test Scheduling and Test Time Minimization of System-on-Chip Using Modified BAT Algorithm","display_name":"Test Scheduling and Test Time Minimization of System-on-Chip Using Modified BAT Algorithm","publication_year":2022,"publication_date":"2022-01-01","ids":{"openalex":"https://openalex.org/W4312284885","doi":"https://doi.org/10.1109/access.2022.3224924"},"language":"en","primary_location":{"id":"doi:10.1109/access.2022.3224924","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3224924","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09964215.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09964215.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5006092412","display_name":"Gokul Chandrasekaran","orcid":"https://orcid.org/0000-0002-3569-9443"},"institutions":[{"id":"https://openalex.org/I33585257","display_name":"Anna University, Chennai","ror":"https://ror.org/01qhf1r47","country_code":"IN","type":"education","lineage":["https://openalex.org/I33585257"]}],"countries":["IN"],"is_corresponding":true,"raw_author_name":"Gokul Chandrasekaran","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Erode, India","Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Anna University Chennai, India"],"raw_orcid":"https://orcid.org/0000-0002-3569-9443","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Erode, India","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Anna University Chennai, India","institution_ids":["https://openalex.org/I33585257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5006810193","display_name":"Neelam Sanjeev Kumar","orcid":"https://orcid.org/0000-0002-4073-2754"},"institutions":[{"id":"https://openalex.org/I85461943","display_name":"Saveetha University","ror":"https://ror.org/0034me914","country_code":"IN","type":"education","lineage":["https://openalex.org/I85461943"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Neelam Sanjeev Kumar","raw_affiliation_strings":["Department of Biomedical Engineering, Saveetha School of Engineering, SIMATS, Chennai, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Biomedical Engineering, Saveetha School of Engineering, SIMATS, Chennai, India","institution_ids":["https://openalex.org/I85461943"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101783787","display_name":"P. Karthikeyan","orcid":null},"institutions":[{"id":"https://openalex.org/I85461943","display_name":"Saveetha University","ror":"https://ror.org/0034me914","country_code":"IN","type":"education","lineage":["https://openalex.org/I85461943"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"P. R. Karthikeyan","raw_affiliation_strings":["Department of Electronics and Communication Engineering, Saveetha School of Engineering, SIMATS, Chennai, India"],"raw_orcid":"https://orcid.org/0000-0001-5340-5229","affiliations":[{"raw_affiliation_string":"Department of Electronics and Communication Engineering, Saveetha School of Engineering, SIMATS, Chennai, India","institution_ids":["https://openalex.org/I85461943"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082747272","display_name":"K. Vanchinathan","orcid":null},"institutions":[{"id":"https://openalex.org/I33585257","display_name":"Anna University, Chennai","ror":"https://ror.org/01qhf1r47","country_code":"IN","type":"education","lineage":["https://openalex.org/I33585257"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"K. Vanchinathan","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Erode, India","Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Anna University Chennai, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Erode, India","institution_ids":[]},{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Velalar College of Engineering and Technology, Anna University Chennai, India","institution_ids":["https://openalex.org/I33585257"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5015403657","display_name":"Neeraj Priyadarshi","orcid":"https://orcid.org/0000-0001-6620-6771"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"Neeraj Priyadarshi","raw_affiliation_strings":["Department of Electrical Engineering, JIS College of Engineering, Kolkata, India"],"raw_orcid":"https://orcid.org/0000-0001-6620-6771","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, JIS College of Engineering, Kolkata, India","institution_ids":[]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5073968263","display_name":"Bhekisipho Twala","orcid":"https://orcid.org/0000-0002-3452-9581"},"institutions":[{"id":"https://openalex.org/I137616099","display_name":"Tshwane University of Technology","ror":"https://ror.org/037mrss42","country_code":"ZA","type":"education","lineage":["https://openalex.org/I137616099"]}],"countries":["ZA"],"is_corresponding":false,"raw_author_name":"Bhekisipho Twala","raw_affiliation_strings":["Digital Transformation Portfolio, Tshwane University of Technology, Pretoria, South Africa","Digital Transformation Portfolio, Tshwane University of Technology, Staatsartillerie Rd, Pretoria West, Pretoria, South Africa"],"raw_orcid":"https://orcid.org/0000-0002-3452-9581","affiliations":[{"raw_affiliation_string":"Digital Transformation Portfolio, Tshwane University of Technology, Pretoria, South Africa","institution_ids":["https://openalex.org/I137616099"]},{"raw_affiliation_string":"Digital Transformation Portfolio, Tshwane University of Technology, Staatsartillerie Rd, Pretoria West, Pretoria, South Africa","institution_ids":["https://openalex.org/I137616099"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":6,"corresponding_author_ids":["https://openalex.org/A5006092412"],"corresponding_institution_ids":["https://openalex.org/I33585257"],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":10.0299,"has_fulltext":true,"cited_by_count":46,"citation_normalized_percentile":{"value":0.98887693,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":98,"max":100},"biblio":{"volume":"10","issue":null,"first_page":"126199","last_page":"126216"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9990000128746033,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10571","display_name":"Robotic Mechanisms and Dynamics","score":0.9846000075340271,"subfield":{"id":"https://openalex.org/subfields/2207","display_name":"Control and Systems Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10743","display_name":"Software Testing and Debugging Techniques","score":0.9800999760627747,"subfield":{"id":"https://openalex.org/subfields/1712","display_name":"Software"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7050597071647644},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.5452138185501099},{"id":"https://openalex.org/keywords/minification","display_name":"Minification","score":0.5401140451431274},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.517022967338562},{"id":"https://openalex.org/keywords/test","display_name":"Test (biology)","score":0.45982813835144043},{"id":"https://openalex.org/keywords/processor-scheduling","display_name":"Processor scheduling","score":0.44809678196907043},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4242643117904663},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3940615952014923},{"id":"https://openalex.org/keywords/real-time-computing","display_name":"Real-time computing","score":0.3531889319419861},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3289884328842163},{"id":"https://openalex.org/keywords/schedule","display_name":"Schedule","score":0.13769850134849548},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.08121010661125183},{"id":"https://openalex.org/keywords/programming-language","display_name":"Programming language","score":0.07111784815788269}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7050597071647644},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.5452138185501099},{"id":"https://openalex.org/C147764199","wikidata":"https://www.wikidata.org/wiki/Q6865248","display_name":"Minification","level":2,"score":0.5401140451431274},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.517022967338562},{"id":"https://openalex.org/C2777267654","wikidata":"https://www.wikidata.org/wiki/Q3519023","display_name":"Test (biology)","level":2,"score":0.45982813835144043},{"id":"https://openalex.org/C2984822820","wikidata":"https://www.wikidata.org/wiki/Q1123036","display_name":"Processor scheduling","level":3,"score":0.44809678196907043},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4242643117904663},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3940615952014923},{"id":"https://openalex.org/C79403827","wikidata":"https://www.wikidata.org/wiki/Q3988","display_name":"Real-time computing","level":1,"score":0.3531889319419861},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3289884328842163},{"id":"https://openalex.org/C68387754","wikidata":"https://www.wikidata.org/wiki/Q7271585","display_name":"Schedule","level":2,"score":0.13769850134849548},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.08121010661125183},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.07111784815788269},{"id":"https://openalex.org/C151730666","wikidata":"https://www.wikidata.org/wiki/Q7205","display_name":"Paleontology","level":1,"score":0.0},{"id":"https://openalex.org/C86803240","wikidata":"https://www.wikidata.org/wiki/Q420","display_name":"Biology","level":0,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2022.3224924","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3224924","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09964215.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:73ca7673ca364541893bfc5572bf78f0","is_oa":true,"landing_page_url":"https://doaj.org/article/73ca7673ca364541893bfc5572bf78f0","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 10, Pp 126199-126216 (2022)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2022.3224924","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3224924","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09964215.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4312284885.pdf","grobid_xml":"https://content.openalex.org/works/W4312284885.grobid-xml"},"referenced_works_count":56,"referenced_works":["https://openalex.org/W158333118","https://openalex.org/W883434633","https://openalex.org/W1486331313","https://openalex.org/W1517843001","https://openalex.org/W1580022276","https://openalex.org/W1647927535","https://openalex.org/W2024518622","https://openalex.org/W2028690601","https://openalex.org/W2031183907","https://openalex.org/W2045753467","https://openalex.org/W2061438946","https://openalex.org/W2070145903","https://openalex.org/W2081828624","https://openalex.org/W2087464906","https://openalex.org/W2101009625","https://openalex.org/W2108028245","https://openalex.org/W2125474840","https://openalex.org/W2143481670","https://openalex.org/W2143978378","https://openalex.org/W2151243068","https://openalex.org/W2160114354","https://openalex.org/W2169064301","https://openalex.org/W2232317135","https://openalex.org/W2530035969","https://openalex.org/W2742961367","https://openalex.org/W2792036734","https://openalex.org/W2802014249","https://openalex.org/W2808950187","https://openalex.org/W2901319424","https://openalex.org/W2911625692","https://openalex.org/W2914738902","https://openalex.org/W2969966087","https://openalex.org/W2969993933","https://openalex.org/W2983699080","https://openalex.org/W2989858941","https://openalex.org/W3004849605","https://openalex.org/W3005965793","https://openalex.org/W3014394630","https://openalex.org/W3015984426","https://openalex.org/W3020734801","https://openalex.org/W3023280725","https://openalex.org/W3023976207","https://openalex.org/W3033396344","https://openalex.org/W3038151853","https://openalex.org/W3038572881","https://openalex.org/W3080360636","https://openalex.org/W3106780774","https://openalex.org/W3136299071","https://openalex.org/W3185882030","https://openalex.org/W4225309869","https://openalex.org/W4246318739","https://openalex.org/W4282940054","https://openalex.org/W6629014410","https://openalex.org/W6634783012","https://openalex.org/W6636858643","https://openalex.org/W6810466852"],"related_works":["https://openalex.org/W3151522584","https://openalex.org/W1497123311","https://openalex.org/W2115140794","https://openalex.org/W2317123011","https://openalex.org/W2041120224","https://openalex.org/W1809394610","https://openalex.org/W2065289416","https://openalex.org/W2017236304","https://openalex.org/W2101285930","https://openalex.org/W2136854845"],"abstract_inverted_index":{"System-on-Chip":[0],"(SoC)":[1],"is":[2,41,57,60,73],"a":[3,12,16,25,74,155],"structure":[4],"in":[5,139],"which":[6,40,159],"semiconductor":[7],"components":[8],"are":[9],"integrated":[10],"into":[11],"single":[13],"die.":[14],"As":[15],"result,":[17],"testing":[18,38,97,162],"time":[19,98,163],"should":[20],"be":[21],"reduced":[22],"to":[23,45,87,130,165],"achieve":[24],"low":[26],"cost":[27],"for":[28,112],"each":[29],"chip.":[30],"Effective":[31],"test":[32,55,143,146],"scheduling":[33,56],"can":[34],"reduce":[35],"the":[36,51,64,91,104,110,131,150,161,170],"SoC":[37,65,172],"time,":[39],"more":[42],"challenging":[43],"due":[44],"its":[46],"complexity.":[47],"In":[48],"this":[49],"paper,":[50],"modified":[52,126,151],"BAT":[53,93,127,152],"algorithm-based":[54],"proposed.":[58],"Testing":[59],"carried":[61],"out":[62],"on":[63,99,169],"ITC\u201902":[66,171],"benchmark":[67,173],"circuits.":[68,174],"The":[69,125,145],"Modified":[70,92],"Bat":[71],"method":[72,95],"recently":[75],"heuristic":[76],"algorithm":[77,128,153],"that":[78,149],"performs":[79],"global":[80],"optimization":[81],"by":[82,108],"imitating":[83],"bat":[84,113],"echolocation.":[85],"Compared":[86],"other":[88,166],"state-of-the-art":[89],"algorithms,":[90],"Optimization":[94],"reduces":[96],"SoCs.":[100],"This":[101],"paper":[102],"improves":[103],"algorithm\u2019s":[105],"exploration":[106],"process":[107],"adjusting":[109],"equation":[111],"loudness":[114],"(A":[115],"<sub":[116],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[117],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">0</sub>":[118],")":[119],"and":[120],"pulse":[121],"emission":[122],"rate":[123],"(r).":[124],"converges":[129],"optimal":[132],"solution":[133],"faster.":[134],"It":[135],"has":[136,154],"been":[137],"used":[138],"14":[140],"international":[141],"standard":[142],"functions.":[144],"results":[147],"indicate":[148],"fast":[156],"convergence":[157],"speed,":[158],"minimizes":[160],"compared":[164],"evolutionary":[167],"algorithms":[168]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":7},{"year":2024,"cited_by_count":6},{"year":2023,"cited_by_count":30}],"updated_date":"2026-05-06T08:25:59.206177","created_date":"2025-10-10T00:00:00"}
