{"id":"https://openalex.org/W4312352584","doi":"https://doi.org/10.1109/access.2022.3221124","title":"FPGA Acceleration of 3GPP Channel Model Emulator for 5G New Radio","display_name":"FPGA Acceleration of 3GPP Channel Model Emulator for 5G New Radio","publication_year":2022,"publication_date":"2022-01-01","ids":{"openalex":"https://openalex.org/W4312352584","doi":"https://doi.org/10.1109/access.2022.3221124"},"language":"en","primary_location":{"id":"doi:10.1109/access.2022.3221124","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3221124","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09944632.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09944632.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5048816374","display_name":"Nasir Ali Shah","orcid":"https://orcid.org/0000-0003-2276-4960"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"Nasir Ali Shah","raw_affiliation_strings":["Department of Electronics and Telecommunications, Politecnico di Torino, Torino, Italy","Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5030646218","display_name":"Mihai T. Lazarescu","orcid":"https://orcid.org/0000-0003-0884-5158"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Mihai T. Lazarescu","raw_affiliation_strings":["Department of Electronics and Telecommunications, Politecnico di Torino, Torino, Italy","Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5079508185","display_name":"Roberto Quasso","orcid":"https://orcid.org/0000-0003-0847-7420"},"institutions":[{"id":"https://openalex.org/I137543953","display_name":"Telecom Italia (Italy)","ror":"https://ror.org/00xmwgm53","country_code":"IT","type":"company","lineage":["https://openalex.org/I137543953"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Roberto Quasso","raw_affiliation_strings":["Innovation Department, Telecom Italia, Rome, Italy"],"affiliations":[{"raw_affiliation_string":"Innovation Department, Telecom Italia, Rome, Italy","institution_ids":["https://openalex.org/I137543953"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5061623196","display_name":"Salvatore Scarpina","orcid":"https://orcid.org/0000-0003-1207-0367"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Salvatore Scarpina","raw_affiliation_strings":["Digital &#x0026; Advanced Technologies, IVECO S.p.A., Turin, Italy","Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino 10129, Italy"],"affiliations":[{"raw_affiliation_string":"Digital &#x0026; Advanced Technologies, IVECO S.p.A., Turin, Italy","institution_ids":[]},{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino 10129, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5050365912","display_name":"Luciano Lavagno","orcid":"https://orcid.org/0000-0002-9762-6522"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Polytechnic University of Turin","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Luciano Lavagno","raw_affiliation_strings":["Department of Electronics and Telecommunications, Politecnico di Torino, Torino, Italy","Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino, Italy"],"affiliations":[{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]},{"raw_affiliation_string":"Department of Electronics and Telecommunications, Politecnico di Torino, Corso Duca degli Abruzzi, 24, Torino, Italy","institution_ids":["https://openalex.org/I177477856"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5048816374"],"corresponding_institution_ids":["https://openalex.org/I177477856"],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":1.1347,"has_fulltext":true,"cited_by_count":5,"citation_normalized_percentile":{"value":0.77033315,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"10","issue":null,"first_page":"119386","last_page":"119401"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9984999895095825,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9937999844551086,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9934999942779541,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.8468592166900635},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7928522825241089},{"id":"https://openalex.org/keywords/high-level-synthesis","display_name":"High-level synthesis","score":0.5503137707710266},{"id":"https://openalex.org/keywords/reconfigurable-computing","display_name":"Reconfigurable computing","score":0.5268824696540833},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5049672722816467},{"id":"https://openalex.org/keywords/emulation","display_name":"Emulation","score":0.46088433265686035},{"id":"https://openalex.org/keywords/design-space-exploration","display_name":"Design space exploration","score":0.44787460565567017},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3939623236656189},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3537076413631439},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.3420506715774536}],"concepts":[{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.8468592166900635},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7928522825241089},{"id":"https://openalex.org/C58013763","wikidata":"https://www.wikidata.org/wiki/Q5754574","display_name":"High-level synthesis","level":3,"score":0.5503137707710266},{"id":"https://openalex.org/C142962650","wikidata":"https://www.wikidata.org/wiki/Q240838","display_name":"Reconfigurable computing","level":3,"score":0.5268824696540833},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5049672722816467},{"id":"https://openalex.org/C149810388","wikidata":"https://www.wikidata.org/wiki/Q5374873","display_name":"Emulation","level":2,"score":0.46088433265686035},{"id":"https://openalex.org/C2776221188","wikidata":"https://www.wikidata.org/wiki/Q21072556","display_name":"Design space exploration","level":2,"score":0.44787460565567017},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3939623236656189},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3537076413631439},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.3420506715774536},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0},{"id":"https://openalex.org/C50522688","wikidata":"https://www.wikidata.org/wiki/Q189833","display_name":"Economic growth","level":1,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2022.3221124","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3221124","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09944632.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:d78c293a74844718856f1fa48ba4131b","is_oa":true,"landing_page_url":"https://doaj.org/article/d78c293a74844718856f1fa48ba4131b","pdf_url":null,"source":{"id":"https://openalex.org/S112646816","display_name":"SHILAP Revista de lepidopterolog\u00eda","issn_l":"0300-5267","issn":["0300-5267","2340-4078"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 10, Pp 119386-119401 (2022)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2022.3221124","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3221124","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09944632.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[{"id":"https://metadata.un.org/sdg/7","display_name":"Affordable and clean energy","score":0.699999988079071}],"awards":[{"id":"https://openalex.org/G4061140470","display_name":null,"funder_award_id":"S21AAPIA","funder_id":"https://openalex.org/F4320309754","funder_display_name":"Telecom Italia"}],"funders":[{"id":"https://openalex.org/F4320309754","display_name":"Telecom Italia","ror":"https://ror.org/00xmwgm53"}],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4312352584.pdf","grobid_xml":"https://content.openalex.org/works/W4312352584.grobid-xml"},"referenced_works_count":43,"referenced_works":["https://openalex.org/W1995207020","https://openalex.org/W2000921084","https://openalex.org/W2015142990","https://openalex.org/W2018055497","https://openalex.org/W2033760566","https://openalex.org/W2063288994","https://openalex.org/W2072079297","https://openalex.org/W2087998432","https://openalex.org/W2093508955","https://openalex.org/W2094655360","https://openalex.org/W2112432448","https://openalex.org/W2124951381","https://openalex.org/W2166029537","https://openalex.org/W2168113051","https://openalex.org/W2168907995","https://openalex.org/W2191327475","https://openalex.org/W2266055932","https://openalex.org/W2274023127","https://openalex.org/W2292770545","https://openalex.org/W2297254310","https://openalex.org/W2584311934","https://openalex.org/W2589329959","https://openalex.org/W2594588350","https://openalex.org/W2599033778","https://openalex.org/W2611229052","https://openalex.org/W2613625031","https://openalex.org/W2768993447","https://openalex.org/W2792845087","https://openalex.org/W2808499605","https://openalex.org/W2906555930","https://openalex.org/W2919367363","https://openalex.org/W2980415509","https://openalex.org/W2999153292","https://openalex.org/W3010349995","https://openalex.org/W3011716828","https://openalex.org/W3106302305","https://openalex.org/W3108085245","https://openalex.org/W3160548752","https://openalex.org/W3167704207","https://openalex.org/W4200566616","https://openalex.org/W4210682153","https://openalex.org/W4226065491","https://openalex.org/W6692960408"],"related_works":["https://openalex.org/W4281926497","https://openalex.org/W2274562545","https://openalex.org/W2612099726","https://openalex.org/W1612076744","https://openalex.org/W2269990635","https://openalex.org/W2126857316","https://openalex.org/W2152074211","https://openalex.org/W3146054601","https://openalex.org/W2129019972","https://openalex.org/W3164085601"],"abstract_inverted_index":{"The":[0,165,251,275],"channel":[1,37,44,166],"model":[2,45,167],"is":[3,49,169],"by":[4,200],"far":[5],"the":[6,12,41,60,108,128,136,158,163,182,186,217,225,233,284,289,309],"most":[7],"computing":[8],"intensive":[9],"part":[10],"of":[11,16,56,79,107,130,162,195,206],"link":[13],"level":[14],"simulations":[15],"multiple-input":[17],"and":[18,53,73,94,139,147,203,212,230,236,293,303],"multiple-output":[19],"(MIMO)":[20],"fifth-generation":[21],"new":[22],"radio":[23],"(5G":[24],"NR)":[25],"communication":[26],"systems.":[27],"Simulation":[28],"effort":[29,183,198],"further":[30],"increases":[31],"when":[32,242,287],"using":[33,117,154,171,189,232,243,288],"more":[34],"realistic":[35],"geometry-based":[36],"models,":[38],"such":[39,57],"as":[40],"three-dimensional":[42],"spatial":[43],"(3D-SCM).":[46],"Channel":[47],"emulation":[48],"used":[50],"for":[51,85,210],"functional":[52],"performance":[54,258],"verification":[55],"models":[58,65],"in":[59,155,180,193,204],"network":[61],"planning":[62],"phase.":[63],"These":[64],"use":[66],"multiple":[67],"finite":[68],"impulse":[69],"response":[70],"(FIR)":[71],"filters":[72],"have":[74],"a":[75,118,244,261],"very":[76],"high":[77],"degree":[78],"parallelism":[80],"which":[81],"can":[82],"be":[83],"exploited":[84],"accelerated":[86],"execution":[87],"on":[88,115,122,135,143],"Field":[89],"Programmable":[90],"Gate":[91],"Array":[92],"(FPGA)":[93],"Graphics":[95],"Processing":[96],"Unit":[97],"(GPU)":[98],"platforms.":[99],"This":[100,177],"paper":[101],"proposes":[102],"an":[103],"efficient":[104],"re-configurable":[105],"implementation":[106,277],"3rd":[109],"generation":[110],"partnership":[111],"project":[112],"(3GPP)":[113],"3D-SCM":[114],"FPGAs":[116],"design":[119],"flow":[120],"based":[121],"high-level":[123],"synthesis":[124],"(HLS).":[125],"It":[126],"studies":[127],"effect":[129],"various":[131],"HLS":[132,160,190],"optimization":[133],"techniques":[134],"total":[137],"latency":[138,302],"hardware":[140],"resource":[141],"utilization":[142],"Xilinx":[144,211,234,290],"Alveo":[145],"U280":[146],"Intel":[148,213,237],"Arria":[149,238],"10GX":[150],"1150":[151],"high-performance":[152],"FPGAs,":[153],"both":[156,192,201],"cases":[157],"commercial":[159],"tools":[161],"producer.":[164],"accuracy":[168],"preserved":[170],"double":[172],"precision":[173],"floating":[174],"point":[175],"arithmetic.":[176],"work":[178],"analyzes":[179],"detail":[181],"to":[184,216,260,281],"target":[185],"FPGA":[187,239,276],"platforms":[188],"tools,":[191],"terms":[194,205],"common":[196],"parallelization":[197],"(shared":[199],"FPGAs),":[202],"platform-specific":[207],"effort,":[208],"different":[209],"FPGAs.":[214],"Compared":[215],"baseline":[218,286],"general-purpose":[219],"central":[220],"processing":[221],"unit":[222],"(CPU)":[223],"implementation,":[224],"achieved":[226,255],"speedups":[227],"are":[228],"65X":[229],"95X":[231],"UltraScale+":[235],"platform":[240],"respectively,":[241],"Double":[245],"Data":[246],"Rate":[247],"(DDR)":[248],"memory":[249],"interface.":[250],"FPGA-based":[252],"designs":[253],"also":[254,298],"~3X":[256],"better":[257],"compared":[259],"similar":[262],"technology":[263],"node":[264],"NVIDIA":[265],"GeForce":[266],"GTX":[267],"1070":[268],"GPU,":[269],"while":[270],"consuming":[271],"~4X":[272],"less":[273],"energy.":[274],"speedup":[278],"improves":[279],"up":[280],"173X":[282],"over":[283],"CPU":[285],"UltraRAM":[291],"(URAM)":[292],"High-Bandwidth":[294],"Memory":[295],"(HBM)":[296],"resources,":[297],"achieving":[299],"6X":[300],"lower":[301,305],"12X":[304],"energy":[306],"consumption":[307],"than":[308],"GPU":[310],"implementation.":[311]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":3},{"year":2023,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
