{"id":"https://openalex.org/W4285308465","doi":"https://doi.org/10.1109/access.2022.3177613","title":"Parallel Multithread Analysis of Extremely Large Simulation Traces","display_name":"Parallel Multithread Analysis of Extremely Large Simulation Traces","publication_year":2022,"publication_date":"2022-01-01","ids":{"openalex":"https://openalex.org/W4285308465","doi":"https://doi.org/10.1109/access.2022.3177613"},"language":"en","primary_location":{"id":"doi:10.1109/access.2022.3177613","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3177613","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09780411.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09780411.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5024226992","display_name":"D. Appello","orcid":"https://orcid.org/0000-0001-8178-2785"},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":true,"raw_author_name":"D. Appello","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049430681","display_name":"Paolo Bernardi","orcid":"https://orcid.org/0000-0002-0985-9327"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Paolo Bernardi","raw_affiliation_strings":["Department of Control and Computer Engineering, Politecnico di Torino, Turin, Italy"],"raw_orcid":"https://orcid.org/0000-0002-0985-9327","affiliations":[{"raw_affiliation_string":"Department of Control and Computer Engineering, Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5032411827","display_name":"Andrea Calabrese","orcid":"https://orcid.org/0000-0002-8854-8171"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Andrea Calabrese","raw_affiliation_strings":["Department of Control and Computer Engineering, Politecnico di Torino, Turin, Italy"],"raw_orcid":"https://orcid.org/0000-0002-8854-8171","affiliations":[{"raw_affiliation_string":"Department of Control and Computer Engineering, Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074023126","display_name":"Giorgio Pollaccia","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"G. Pollaccia","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5023997315","display_name":"Stefano Quer","orcid":"https://orcid.org/0000-0001-6835-8277"},"institutions":[{"id":"https://openalex.org/I177477856","display_name":"Politecnico di Torino","ror":"https://ror.org/00bgk9508","country_code":"IT","type":"education","lineage":["https://openalex.org/I177477856"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"Stefano Quer","raw_affiliation_strings":["Department of Control and Computer Engineering, Politecnico di Torino, Turin, Italy"],"raw_orcid":"https://orcid.org/0000-0001-6835-8277","affiliations":[{"raw_affiliation_string":"Department of Control and Computer Engineering, Politecnico di Torino, Turin, Italy","institution_ids":["https://openalex.org/I177477856"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043908290","display_name":"Vincenzo Tancorre","orcid":"https://orcid.org/0000-0001-7959-0784"},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"V. Tancorre","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy"],"raw_orcid":"https://orcid.org/0000-0001-7959-0784","affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy","institution_ids":["https://openalex.org/I4210154781"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091628822","display_name":"R. Ugioli","orcid":null},"institutions":[{"id":"https://openalex.org/I4210154781","display_name":"STMicroelectronics (Italy)","ror":"https://ror.org/053bqv655","country_code":"IT","type":"company","lineage":["https://openalex.org/I131827901","https://openalex.org/I4210154781"]}],"countries":["IT"],"is_corresponding":false,"raw_author_name":"R. Ugioli","raw_affiliation_strings":["STMicroelectronics, Agrate Brianza, Italy","STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"STMicroelectronics, Agrate Brianza, Italy","institution_ids":["https://openalex.org/I4210154781"]},{"raw_affiliation_string":"STMicroelectronics, Via Camillo Olivetti 2, 20864 Agrate Brianza (MB), Italy","institution_ids":["https://openalex.org/I4210154781"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":7,"corresponding_author_ids":["https://openalex.org/A5024226992"],"corresponding_institution_ids":["https://openalex.org/I4210154781"],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":0.933,"has_fulltext":true,"cited_by_count":4,"citation_normalized_percentile":{"value":0.72066738,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":96},"biblio":{"volume":"10","issue":null,"first_page":"56440","last_page":"56457"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10054","display_name":"Parallel Computing and Optimization Techniques","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10715","display_name":"Distributed and Parallel Computing Systems","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9983000159263611,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7896451950073242},{"id":"https://openalex.org/keywords/thread","display_name":"Thread (computing)","score":0.7320646643638611},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.5990160703659058},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.23288792371749878}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7896451950073242},{"id":"https://openalex.org/C138101251","wikidata":"https://www.wikidata.org/wiki/Q213092","display_name":"Thread (computing)","level":2,"score":0.7320646643638611},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.5990160703659058},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.23288792371749878}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2022.3177613","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3177613","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09780411.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:88a0fc25934b483f890dc23573456d38","is_oa":true,"landing_page_url":"https://doaj.org/article/88a0fc25934b483f890dc23573456d38","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 10, Pp 56440-56457 (2022)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2022.3177613","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2022.3177613","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/6514899/09780411.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[],"funders":[],"has_content":{"grobid_xml":true,"pdf":true},"content_urls":{"pdf":"https://content.openalex.org/works/W4285308465.pdf","grobid_xml":"https://content.openalex.org/works/W4285308465.grobid-xml"},"referenced_works_count":25,"referenced_works":["https://openalex.org/W1545099940","https://openalex.org/W1578415644","https://openalex.org/W1906914439","https://openalex.org/W1985291160","https://openalex.org/W2023029368","https://openalex.org/W2068771685","https://openalex.org/W2084070016","https://openalex.org/W2086978559","https://openalex.org/W2095892316","https://openalex.org/W2106290576","https://openalex.org/W2127093012","https://openalex.org/W2134848334","https://openalex.org/W2148529446","https://openalex.org/W2158212325","https://openalex.org/W2163620213","https://openalex.org/W2549560969","https://openalex.org/W2613613142","https://openalex.org/W2890296644","https://openalex.org/W2937947223","https://openalex.org/W3007848906","https://openalex.org/W3108114694","https://openalex.org/W3142218480","https://openalex.org/W3160934116","https://openalex.org/W3188239650","https://openalex.org/W4232332415"],"related_works":["https://openalex.org/W2748952813","https://openalex.org/W2390279801","https://openalex.org/W2358668433","https://openalex.org/W2376932109","https://openalex.org/W2001405890","https://openalex.org/W2382290278","https://openalex.org/W2478288626","https://openalex.org/W4391913857","https://openalex.org/W2023832055","https://openalex.org/W2082485924"],"abstract_inverted_index":{"With":[0],"the":[1,4,11,34,50,94,98,108,136,146,185,208],"explosion":[2],"in":[3,107],"size":[5],"of":[6,13,36,45,66,90,149,216,220],"off-the-shelf":[7],"integrated":[8],"circuits":[9],"and":[10,25,53,69,79,97,124,152,166,183,211],"advent":[12],"novel":[14],"techniques":[15,178],"related":[16],"to":[17,32,92,101,134,158,179,194,223],"failure":[18],"modes,":[19],"commercial":[20,121],"Automatic":[21,125],"Test":[22,126],"Pattern":[23,127],"Generator":[24],"fault":[26,122],"simulation":[27,47,61,191],"engines":[28],"are":[29],"often":[30],"insufficient":[31],"measure":[33],"coverage":[35],"particular":[37],"metrics.":[38,201],"Consequently,":[39],"a":[40,88],"general":[41],"working":[42],"framework":[43],"consists":[44],"storing":[46],"traces":[48,62,192],"during":[49],"analysis":[51,71,137],"phase":[52],"collecting":[54],"test":[55],"statistics":[56],"from":[57,175],"post-processing.":[58],"Unfortunately,":[59],"typical":[60],"can":[63,72,204],"be":[64],"hundreds":[65],"gigabytes":[67],"long,":[68],"their":[70],"require":[73],"several":[74,140,172],"days,":[75],"even":[76],"on":[77,116],"large":[78],"powerful":[80],"computational":[81],"servers.":[82],"In":[83],"this":[84],"paper,":[85],"we":[86,203,212],"propose":[87],"set":[89],"strategies":[91],"mitigate":[93],"evaluation":[95],"time":[96,182,214],"memory":[99,209],"needed":[100],"analyze":[102,190],"huge":[103],"dump":[104],"files":[105],"stored":[106],"standard":[109],"Value":[110],"Change":[111],"Dump":[112],"format.":[113],"We":[114,131,144,170,189],"concentrate":[115],"burn-in-related":[117],"metrics":[118],"that":[119],"current":[120],"simulators":[123],"Generators":[128],"cannot":[129],"evaluate.":[130],"show":[132,213],"how":[133],"divide":[135],"process":[138,148],"into":[139],"concurrent":[141],"pipeline":[142,187],"stages.":[143],"revise":[145],"logic":[147],"each":[150],"stage":[151],"all":[153],"principal":[154],"intermediate":[155],"data":[156],"structures,":[157],"adopt":[159],"smart":[160],"parallelization":[161],"with":[162],"very":[163],"low":[164,168],"contention":[165],"extremely":[167],"overhead.":[169],"exploit":[171],"low-level":[173],"optimizations":[174],"modern":[176],"programming":[177],"reduce":[180],"computation":[181],"balance":[184],"different":[186,199],"phases.":[188],"up":[193],"almost":[195],"250":[196],"GBytes":[197],"computing":[198],"testing":[200],"Overall,":[202],"keep":[205],"under":[206],"control":[207],"usage,":[210],"improvements":[215],"over":[217],"two":[218],"orders":[219],"magnitude":[221],"compared":[222],"previously":[224],"adopted":[225],"state-of-the-art":[226],"tools.":[227]},"counts_by_year":[{"year":2025,"cited_by_count":2},{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1}],"updated_date":"2026-05-06T08:25:59.206177","created_date":"2025-10-10T00:00:00"}