{"id":"https://openalex.org/W3163156838","doi":"https://doi.org/10.1109/access.2021.3081359","title":"Reduced Pin-Count Test Strategy for 3D Stacked ICs Using Simultaneous Bi-Directional Signaling Based Time Division Multiplexing","display_name":"Reduced Pin-Count Test Strategy for 3D Stacked ICs Using Simultaneous Bi-Directional Signaling Based Time Division Multiplexing","publication_year":2021,"publication_date":"2021-01-01","ids":{"openalex":"https://openalex.org/W3163156838","doi":"https://doi.org/10.1109/access.2021.3081359","mag":"3163156838"},"language":"en","primary_location":{"id":"doi:10.1109/access.2021.3081359","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3081359","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09433547.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09433547.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5019302065","display_name":"Iftikhar A. Soomro","orcid":"https://orcid.org/0000-0001-6510-3551"},"institutions":[{"id":"https://openalex.org/I82284825","display_name":"Cranfield University","ror":"https://ror.org/05cncd958","country_code":"GB","type":"education","lineage":["https://openalex.org/I82284825"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Iftikhar A. Soomro","raw_affiliation_strings":["School of Aerospace, Transport and Manufacturing, Cranfield University, Cranfield, U.K"],"raw_orcid":"https://orcid.org/0000-0001-6510-3551","affiliations":[{"raw_affiliation_string":"School of Aerospace, Transport and Manufacturing, Cranfield University, Cranfield, U.K","institution_ids":["https://openalex.org/I82284825"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5101430659","display_name":"Mohammad Samie","orcid":"https://orcid.org/0000-0002-8850-5606"},"institutions":[{"id":"https://openalex.org/I82284825","display_name":"Cranfield University","ror":"https://ror.org/05cncd958","country_code":"GB","type":"education","lineage":["https://openalex.org/I82284825"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Mohammad Samie","raw_affiliation_strings":["School of Aerospace, Transport and Manufacturing, Cranfield University, Cranfield, U.K"],"raw_orcid":"https://orcid.org/0000-0002-8850-5606","affiliations":[{"raw_affiliation_string":"School of Aerospace, Transport and Manufacturing, Cranfield University, Cranfield, U.K","institution_ids":["https://openalex.org/I82284825"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5091345157","display_name":"Ian Jennions","orcid":"https://orcid.org/0000-0002-5752-1873"},"institutions":[{"id":"https://openalex.org/I82284825","display_name":"Cranfield University","ror":"https://ror.org/05cncd958","country_code":"GB","type":"education","lineage":["https://openalex.org/I82284825"]}],"countries":["GB"],"is_corresponding":false,"raw_author_name":"Ian K. Jennions","raw_affiliation_strings":["School of Aerospace, Transport and Manufacturing, Cranfield University, Cranfield, U.K"],"raw_orcid":"https://orcid.org/0000-0002-5752-1873","affiliations":[{"raw_affiliation_string":"School of Aerospace, Transport and Manufacturing, Cranfield University, Cranfield, U.K","institution_ids":["https://openalex.org/I82284825"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":0.4719,"has_fulltext":true,"cited_by_count":2,"citation_normalized_percentile":{"value":0.58361409,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":94},"biblio":{"volume":"9","issue":null,"first_page":"75892","last_page":"75904"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11527","display_name":"3D IC and TSV technologies","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T14117","display_name":"Integrated Circuits and Semiconductor Failure Analysis","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.5974549055099487},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.5882455110549927},{"id":"https://openalex.org/keywords/test-compression","display_name":"Test compression","score":0.5685089230537415},{"id":"https://openalex.org/keywords/time-division-multiplexing","display_name":"Time-division multiplexing","score":0.5370743274688721},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.5271731615066528},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.5211934447288513},{"id":"https://openalex.org/keywords/bandwidth","display_name":"Bandwidth (computing)","score":0.5065680742263794},{"id":"https://openalex.org/keywords/reduction","display_name":"Reduction (mathematics)","score":0.4942493736743927},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.4854786694049835},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4759659171104431},{"id":"https://openalex.org/keywords/interconnection","display_name":"Interconnection","score":0.46306127309799194},{"id":"https://openalex.org/keywords/signal-integrity","display_name":"Signal integrity","score":0.45230674743652344},{"id":"https://openalex.org/keywords/die","display_name":"Die (integrated circuit)","score":0.4311542510986328},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.3749493956565857},{"id":"https://openalex.org/keywords/electronic-circuit","display_name":"Electronic circuit","score":0.37242764234542847},{"id":"https://openalex.org/keywords/automatic-test-pattern-generation","display_name":"Automatic test pattern generation","score":0.3482593297958374},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.23021644353866577},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.20879298448562622},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.16030994057655334}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.5974549055099487},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.5882455110549927},{"id":"https://openalex.org/C29652920","wikidata":"https://www.wikidata.org/wiki/Q7705757","display_name":"Test compression","level":4,"score":0.5685089230537415},{"id":"https://openalex.org/C50661577","wikidata":"https://www.wikidata.org/wiki/Q901831","display_name":"Time-division multiplexing","level":3,"score":0.5370743274688721},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.5271731615066528},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.5211934447288513},{"id":"https://openalex.org/C2776257435","wikidata":"https://www.wikidata.org/wiki/Q1576430","display_name":"Bandwidth (computing)","level":2,"score":0.5065680742263794},{"id":"https://openalex.org/C111335779","wikidata":"https://www.wikidata.org/wiki/Q3454686","display_name":"Reduction (mathematics)","level":2,"score":0.4942493736743927},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.4854786694049835},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4759659171104431},{"id":"https://openalex.org/C123745756","wikidata":"https://www.wikidata.org/wiki/Q1665949","display_name":"Interconnection","level":2,"score":0.46306127309799194},{"id":"https://openalex.org/C44938667","wikidata":"https://www.wikidata.org/wiki/Q4503810","display_name":"Signal integrity","level":3,"score":0.45230674743652344},{"id":"https://openalex.org/C111106434","wikidata":"https://www.wikidata.org/wiki/Q1072430","display_name":"Die (integrated circuit)","level":2,"score":0.4311542510986328},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.3749493956565857},{"id":"https://openalex.org/C134146338","wikidata":"https://www.wikidata.org/wiki/Q1815901","display_name":"Electronic circuit","level":2,"score":0.37242764234542847},{"id":"https://openalex.org/C17626397","wikidata":"https://www.wikidata.org/wiki/Q837455","display_name":"Automatic test pattern generation","level":3,"score":0.3482593297958374},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.23021644353866577},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.20879298448562622},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.16030994057655334},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/access.2021.3081359","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3081359","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09433547.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:78016fdf1ff1450b8e695d207c121cdf","is_oa":true,"landing_page_url":"https://doaj.org/article/78016fdf1ff1450b8e695d207c121cdf","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 9, Pp 75892-75904 (2021)","raw_type":"article"},{"id":"pmh:oai:dspace.lib.cranfield.ac.uk:1826/16740","is_oa":true,"landing_page_url":"https://dspace.lib.cranfield.ac.uk/handle/1826/16740","pdf_url":null,"source":{"id":"https://openalex.org/S4306401778","display_name":"CERES (Cranfield University)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I82284825","host_organization_name":"Cranfield University","host_organization_lineage":["https://openalex.org/I82284825"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-nc-nd","license_id":"https://openalex.org/licenses/cc-by-nc-nd","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"","raw_type":"Article"}],"best_oa_location":{"id":"doi:10.1109/access.2021.3081359","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3081359","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09433547.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","score":0.6100000143051147,"id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3163156838.pdf","grobid_xml":"https://content.openalex.org/works/W3163156838.grobid-xml"},"referenced_works_count":47,"referenced_works":["https://openalex.org/W1486651006","https://openalex.org/W1490400474","https://openalex.org/W1527397031","https://openalex.org/W1580813266","https://openalex.org/W1595368737","https://openalex.org/W1680909298","https://openalex.org/W1947418710","https://openalex.org/W2000013270","https://openalex.org/W2010037194","https://openalex.org/W2027712195","https://openalex.org/W2040730219","https://openalex.org/W2046574526","https://openalex.org/W2048385282","https://openalex.org/W2063609613","https://openalex.org/W2074628056","https://openalex.org/W2110796985","https://openalex.org/W2112041422","https://openalex.org/W2112647513","https://openalex.org/W2115697688","https://openalex.org/W2118898957","https://openalex.org/W2128485160","https://openalex.org/W2135627440","https://openalex.org/W2140035276","https://openalex.org/W2143155486","https://openalex.org/W2143502515","https://openalex.org/W2152186604","https://openalex.org/W2153208491","https://openalex.org/W2155707315","https://openalex.org/W2158277795","https://openalex.org/W2161399456","https://openalex.org/W2165642910","https://openalex.org/W2168899857","https://openalex.org/W2295947403","https://openalex.org/W2339835718","https://openalex.org/W2344109838","https://openalex.org/W2347189907","https://openalex.org/W2602544912","https://openalex.org/W2766204388","https://openalex.org/W2794817082","https://openalex.org/W2884757177","https://openalex.org/W2900535088","https://openalex.org/W3010619226","https://openalex.org/W3139679949","https://openalex.org/W4235430437","https://openalex.org/W4243047118","https://openalex.org/W6640775322","https://openalex.org/W6650341378"],"related_works":["https://openalex.org/W4285708951","https://openalex.org/W1979305473","https://openalex.org/W2786111245","https://openalex.org/W2147986372","https://openalex.org/W3009953521","https://openalex.org/W4231798798","https://openalex.org/W2125317684","https://openalex.org/W4234763172","https://openalex.org/W2570882127","https://openalex.org/W2323083271"],"abstract_inverted_index":{"3D":[0,41],"Stacked":[1],"Integrated":[2],"Circuits":[3],"(SICs)":[4],"offer":[5],"a":[6,29,106,111,123,145,160,174,226,269,277],"promising":[7],"way":[8],"to":[9,24,117,143,163,167,194,209,244,247,263,285],"cope":[10],"with":[11,192],"the":[12,16,37,49,93,204,220,256],"technology":[13,253],"scaling;":[14],"however,":[15],"test":[17,33,51,147,175,227,234,240,266,288],"access":[18],"requirements":[19],"are":[20,43,58,134],"highly":[21],"complicated":[22],"due":[23],"increased":[25],"transistor":[26],"density":[27],"and":[28,169,239],"limited":[30],"number":[31,205],"of":[32,45,83,181,206,271,283],"channels.":[34],"Moreover,":[35],"although":[36],"vertical":[38],"interconnects":[39],"in":[40,104,190],"SIC":[42],"capable":[44,282],"high-speed":[46],"data":[47,121],"transfer,":[48],"overall":[50],"speed":[52],"is":[53,280],"restricted":[54],"by":[55,92,230],"scan-chains":[56],"that":[57,128,255],"not":[59],"optimized":[60],"for":[61,268,274],"timing.":[62],"Reduced":[63],"Pin-Count":[64],"Testing":[65],"(RPCT)":[66],"has":[67],"been":[68],"effectively":[69],"used":[70,116,165,189],"under":[71],"these":[72,97],"scenarios.":[73],"In":[74,149],"particular,":[75],"Time":[76],"Division":[77],"Multiplexing":[78],"(TDM)":[79],"allows":[80,159],"full":[81],"utilization":[82],"interconnect":[84],"bandwidth":[85],"while":[86,200],"providing":[87],"low":[88],"scan":[89,94],"frequencies":[90],"supported":[91],"chains.":[95],"However,":[96],"methods":[98],"rely":[99],"on":[100],"Uni-Directional":[101],"Signaling":[102,156],"(UDS),":[103],"which":[105,158],"chip":[107,132,161],"terminal":[108,162],"(pin":[109],"or":[110,119,141],"TSV)":[112],"can":[113,187,259],"either":[114],"be":[115,164,188,223],"transmit":[118],"receive":[120,170],"at":[122,129,136,261],"given":[124],"time.":[125],"This":[126],"requires":[127],"least":[130],"two":[131],"terminals":[133],"available":[135,233],"every":[137],"die":[138],"interface":[139],"(Tester-Die":[140],"Die-Die)":[142],"form":[144],"single":[146],"channel.":[148],"this":[150],"paper,":[151],"we":[152],"propose":[153],"Simultaneous":[154],"Bi-Directional":[155],"(SBS),":[157],"simultaneously":[166],"send":[168],"data,":[171],"thus":[172],"forming":[173],"channel":[176],"using":[177,201,251],"one":[178],"pin":[179,197],"instead":[180],"two.":[182],"We":[183],"demonstrate":[184],"how":[185],"SBS":[186],"conjunction":[191],"TDM":[193,211],"achieve":[195],"reduced":[196],"count":[198],"testing":[199],"only":[202,215],"half":[203,245],"pins":[207],"compared":[208,246],"conventional":[210],"based":[212],"methods,":[213],"consuming":[214],"22.6%":[216],"additional":[217],"power.":[218],"Alternatively,":[219],"advantage":[221],"could":[222],"manifested":[224],"as":[225],"time":[228,241],"reduction":[229,242],"utilizing":[231],"all":[232],"channels,":[235],"allowing":[236],"more":[237],"parallelism":[238],"down":[243],"UDS-based":[248],"TDM.":[249],"Experiments":[250],"45nm":[252],"suggest":[254],"proposed":[257,281],"method":[258],"operate":[260],"up":[262,284],"1.2":[264],"GHz":[265,287],"clock":[267],"stack":[270],"3-dies,":[272],"whereas":[273],"higher":[275],"frequencies,":[276],"binary-weighted":[278],"transmitter":[279],"2.46":[286],"clock.":[289]},"counts_by_year":[{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2021-05-24T00:00:00"}
