{"id":"https://openalex.org/W3148189932","doi":"https://doi.org/10.1109/access.2021.3066537","title":"Flexible Spare Core Placement in Torus Topology Based NoCs and Its Validation on an FPGA","display_name":"Flexible Spare Core Placement in Torus Topology Based NoCs and Its Validation on an FPGA","publication_year":2021,"publication_date":"2021-01-01","ids":{"openalex":"https://openalex.org/W3148189932","doi":"https://doi.org/10.1109/access.2021.3066537","mag":"3148189932"},"language":"en","primary_location":{"id":"doi:10.1109/access.2021.3066537","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3066537","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09380138.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09380138.pdf","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5068260121","display_name":"P. Veda Bhanu","orcid":"https://orcid.org/0000-0001-5663-8407"},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]},{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"P. Veda Bhanu","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India"],"raw_orcid":"https://orcid.org/0000-0001-5663-8407","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031569021","display_name":"Rahul Govindan","orcid":"https://orcid.org/0000-0002-9581-0705"},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]},{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Rahul Govindan","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India"],"raw_orcid":"https://orcid.org/0000-0002-9581-0705","affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008859780","display_name":"Plava Kattamuri","orcid":null},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]},{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"Plava Kattamuri","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5108117366","display_name":"J. Soumya","orcid":"https://orcid.org/0000-0003-2276-1698"},"institutions":[{"id":"https://openalex.org/I4210101034","display_name":"Birla Institute of Technology and Science - Hyderabad Campus","ror":"https://ror.org/014ctt859","country_code":"IN","type":"education","lineage":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]},{"id":"https://openalex.org/I74796645","display_name":"Birla Institute of Technology and Science, Pilani","ror":"https://ror.org/001p3jz28","country_code":"IN","type":"education","lineage":["https://openalex.org/I74796645"]}],"countries":["IN"],"is_corresponding":false,"raw_author_name":"J. Soumya","raw_affiliation_strings":["Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical and Electronics Engineering, Birla Institute of Technology and Science, Pilani-Hyderabad Campus, Hyderabad, India","institution_ids":["https://openalex.org/I4210101034","https://openalex.org/I74796645"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5014288820","display_name":"Linga Reddy Cenkeramaddi","orcid":"https://orcid.org/0000-0002-1023-2118"},"institutions":[{"id":"https://openalex.org/I200650556","display_name":"University of Agder","ror":"https://ror.org/03x297z98","country_code":"NO","type":"education","lineage":["https://openalex.org/I200650556"]}],"countries":["NO"],"is_corresponding":false,"raw_author_name":"Linga Reddy Cenkeramaddi","raw_affiliation_strings":["Department of Information and Communication Technology, University of Agder (UiA), Grimstad, Norway"],"raw_orcid":"https://orcid.org/0000-0002-1023-2118","affiliations":[{"raw_affiliation_string":"Department of Information and Communication Technology, University of Agder (UiA), Grimstad, Norway","institution_ids":["https://openalex.org/I200650556"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":3,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":1.823,"has_fulltext":true,"cited_by_count":19,"citation_normalized_percentile":{"value":0.85411621,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":99},"biblio":{"volume":"9","issue":null,"first_page":"45935","last_page":"45954"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10829","display_name":"Interconnection Networks and Systems","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/1705","display_name":"Computer Networks and Communications"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T13182","display_name":"Quantum-Dot Cellular Automata","score":0.9951000213623047,"subfield":{"id":"https://openalex.org/subfields/1703","display_name":"Computational Theory and Mathematics"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":0.9943000078201294,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/router","display_name":"Router","score":0.7679321765899658},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7053913474082947},{"id":"https://openalex.org/keywords/network-topology","display_name":"Network topology","score":0.632724404335022},{"id":"https://openalex.org/keywords/network-on-a-chip","display_name":"Network on a chip","score":0.6214222311973572},{"id":"https://openalex.org/keywords/fault-tolerance","display_name":"Fault tolerance","score":0.6143011450767517},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.5495985746383667},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.5234641432762146},{"id":"https://openalex.org/keywords/spare-part","display_name":"Spare part","score":0.5221274495124817},{"id":"https://openalex.org/keywords/routing","display_name":"Routing (electronic design automation)","score":0.46784815192222595},{"id":"https://openalex.org/keywords/topology","display_name":"Topology (electrical circuits)","score":0.45383548736572266},{"id":"https://openalex.org/keywords/heuristic","display_name":"Heuristic","score":0.44861993193626404},{"id":"https://openalex.org/keywords/reliability","display_name":"Reliability (semiconductor)","score":0.4381817579269409},{"id":"https://openalex.org/keywords/integer-programming","display_name":"Integer programming","score":0.4331142008304596},{"id":"https://openalex.org/keywords/distributed-computing","display_name":"Distributed computing","score":0.3907959461212158},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3407028317451477},{"id":"https://openalex.org/keywords/computer-network","display_name":"Computer network","score":0.20047664642333984},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.19135332107543945},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.11772456765174866}],"concepts":[{"id":"https://openalex.org/C2775896111","wikidata":"https://www.wikidata.org/wiki/Q642560","display_name":"Router","level":2,"score":0.7679321765899658},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7053913474082947},{"id":"https://openalex.org/C199845137","wikidata":"https://www.wikidata.org/wiki/Q145490","display_name":"Network topology","level":2,"score":0.632724404335022},{"id":"https://openalex.org/C128519102","wikidata":"https://www.wikidata.org/wiki/Q339554","display_name":"Network on a chip","level":2,"score":0.6214222311973572},{"id":"https://openalex.org/C63540848","wikidata":"https://www.wikidata.org/wiki/Q3140932","display_name":"Fault tolerance","level":2,"score":0.6143011450767517},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.5495985746383667},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.5234641432762146},{"id":"https://openalex.org/C194648553","wikidata":"https://www.wikidata.org/wiki/Q1364774","display_name":"Spare part","level":2,"score":0.5221274495124817},{"id":"https://openalex.org/C74172769","wikidata":"https://www.wikidata.org/wiki/Q1446839","display_name":"Routing (electronic design automation)","level":2,"score":0.46784815192222595},{"id":"https://openalex.org/C184720557","wikidata":"https://www.wikidata.org/wiki/Q7825049","display_name":"Topology (electrical circuits)","level":2,"score":0.45383548736572266},{"id":"https://openalex.org/C173801870","wikidata":"https://www.wikidata.org/wiki/Q201413","display_name":"Heuristic","level":2,"score":0.44861993193626404},{"id":"https://openalex.org/C43214815","wikidata":"https://www.wikidata.org/wiki/Q7310987","display_name":"Reliability (semiconductor)","level":3,"score":0.4381817579269409},{"id":"https://openalex.org/C56086750","wikidata":"https://www.wikidata.org/wiki/Q6042592","display_name":"Integer programming","level":2,"score":0.4331142008304596},{"id":"https://openalex.org/C120314980","wikidata":"https://www.wikidata.org/wiki/Q180634","display_name":"Distributed computing","level":1,"score":0.3907959461212158},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3407028317451477},{"id":"https://openalex.org/C31258907","wikidata":"https://www.wikidata.org/wiki/Q1301371","display_name":"Computer network","level":1,"score":0.20047664642333984},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.19135332107543945},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.11772456765174866},{"id":"https://openalex.org/C62520636","wikidata":"https://www.wikidata.org/wiki/Q944","display_name":"Quantum mechanics","level":1,"score":0.0},{"id":"https://openalex.org/C78519656","wikidata":"https://www.wikidata.org/wiki/Q101333","display_name":"Mechanical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.0},{"id":"https://openalex.org/C163258240","wikidata":"https://www.wikidata.org/wiki/Q25342","display_name":"Power (physics)","level":2,"score":0.0},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.0},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.0}],"mesh":[],"locations_count":3,"locations":[{"id":"doi:10.1109/access.2021.3066537","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3066537","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09380138.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:331b8a5e891a4d9b922d5c287fe47a3d","is_oa":true,"landing_page_url":"https://doaj.org/article/331b8a5e891a4d9b922d5c287fe47a3d","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 9, Pp 45935-45954 (2021)","raw_type":"article"},{"id":"pmh:oai:uia.brage.unit.no:11250/2989956","is_oa":true,"landing_page_url":"https://hdl.handle.net/11250/2989956","pdf_url":null,"source":{"id":"https://openalex.org/S4306401716","display_name":"Duo Research Archive (University of Oslo)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":"https://openalex.org/I184942183","host_organization_name":"University of Oslo","host_organization_lineage":["https://openalex.org/I184942183"],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"45935-45954","raw_type":"info:eu-repo/semantics/article"}],"best_oa_location":{"id":"doi:10.1109/access.2021.3066537","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2021.3066537","pdf_url":"https://ieeexplore.ieee.org/ielx7/6287639/9312710/09380138.pdf","source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":"cc-by","license_id":"https://openalex.org/licenses/cc-by","version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[{"score":0.44999998807907104,"id":"https://metadata.un.org/sdg/9","display_name":"Industry, innovation and infrastructure"}],"awards":[{"id":"https://openalex.org/G2988788431","display_name":null,"funder_award_id":"ECR/2016/001389","funder_id":"https://openalex.org/F4320334771","funder_display_name":"Science and Engineering Research Board"},{"id":"https://openalex.org/G4313239962","display_name":null,"funder_award_id":"Dt. 06/03/2017","funder_id":"https://openalex.org/F4320334771","funder_display_name":"Science and Engineering Research Board"},{"id":"https://openalex.org/G7618422984","display_name":null,"funder_award_id":"287918","funder_id":"https://openalex.org/F4320323299","funder_display_name":"Norges Forskningsr\u00e5d"}],"funders":[{"id":"https://openalex.org/F4320323299","display_name":"Norges Forskningsr\u00e5d","ror":"https://ror.org/00epmv149"},{"id":"https://openalex.org/F4320334771","display_name":"Science and Engineering Research Board","ror":"https://ror.org/03ffdsr55"}],"has_content":{"pdf":true,"grobid_xml":true},"content_urls":{"pdf":"https://content.openalex.org/works/W3148189932.pdf","grobid_xml":"https://content.openalex.org/works/W3148189932.grobid-xml"},"referenced_works_count":31,"referenced_works":["https://openalex.org/W1489737032","https://openalex.org/W2000319918","https://openalex.org/W2033419605","https://openalex.org/W2050888526","https://openalex.org/W2057785859","https://openalex.org/W2077505860","https://openalex.org/W2091518118","https://openalex.org/W2094485175","https://openalex.org/W2095998827","https://openalex.org/W2112199513","https://openalex.org/W2123184444","https://openalex.org/W2142386205","https://openalex.org/W2146673261","https://openalex.org/W2152099665","https://openalex.org/W2152195021","https://openalex.org/W2160642395","https://openalex.org/W2517146661","https://openalex.org/W2543580944","https://openalex.org/W2750976153","https://openalex.org/W2773219026","https://openalex.org/W2779609477","https://openalex.org/W2887125737","https://openalex.org/W2895216495","https://openalex.org/W2908838279","https://openalex.org/W2938373256","https://openalex.org/W2953689691","https://openalex.org/W3001825982","https://openalex.org/W3013310755","https://openalex.org/W3106447748","https://openalex.org/W4250661686","https://openalex.org/W6676972942"],"related_works":["https://openalex.org/W2052816277","https://openalex.org/W2167988973","https://openalex.org/W2603824091","https://openalex.org/W2560886726","https://openalex.org/W2091258882","https://openalex.org/W2541438272","https://openalex.org/W2013729863","https://openalex.org/W3006485811","https://openalex.org/W2510977931","https://openalex.org/W2181632526"],"abstract_inverted_index":{"In":[0,137,166,222,356],"the":[1,14,66,74,97,104,116,138,161,167,223,227,234,241,250,268,271,277,295,303,309,313,326,334,349,357,376,385,388,392,396],"nano-scale":[2],"era,":[3],"Network-on-Chip":[4],"(NoC)":[5],"interconnection":[6],"paradigm":[7],"has":[8,208],"gained":[9],"importance":[10],"to":[11,36,39,85],"abide":[12],"by":[13,127,199,219,232,275,307],"communication":[15,292],"challenges":[16],"in":[17,55,69,211,240,267,291,312,370,395],"Chip":[18],"Multi-Processors":[19],"(CMPs).":[20],"With":[21],"increased":[22],"integration":[23],"density":[24],"on":[25,100,106,134,145],"CMPs,":[26],"NoC":[27,56,78,110,125,173],"components":[28],"namely":[29],"cores,":[30],"routers,":[31],"and":[32,131,150,183,203,214,237,262,299,323,330,346,353,380],"links":[33],"are":[34,83,91,229],"susceptible":[35],"failures.":[37],"Therefore,":[38],"improve":[40],"system":[41],"reliability,":[42],"there":[43],"is":[44,111],"a":[45,141],"need":[46],"for":[47,160],"efficient":[48],"fault-tolerant":[49,62,98,184],"techniques":[50,63,82],"that":[51,64,94],"mitigate":[52],"permanent":[53,67],"faults":[54,68,130,239,311],"based":[57,88,144,152],"CMPs.":[58],"There":[59,90],"exists":[60],"several":[61],"address":[65],"application":[70,205,373],"cores":[71,76],"while":[72],"placing":[73],"spare":[75,120,164,187],"onto":[77,122,189],"topologies.":[79],"However,":[80],"these":[81],"limited":[84],"Mesh":[86],"topology":[87,191],"NoCs.":[89],"few":[92],"approaches":[93,296,327,350,377,393],"have":[95,157,171,196],"realized":[96],"solutions":[99],"an":[101,135,193,284,318,340,363],"FPGA,":[102],"but":[103],"study":[105],"architectural":[107],"aspects":[108],"of":[109,119,163,186,287,320,343,366,372,387],"limited.":[112],"This":[113,207,383],"paper":[114],"presents":[115],"flexible":[117],"placement":[118,162,185],"core":[121,129,188],"Torus":[123,190],"topology-based":[124],"design":[126],"considering":[128],"validating":[132],"it":[133],"FPGA.":[136,194],"first":[139],"phase,":[140,169],"mathematical":[142],"formulation":[143],"Integer":[146],"Linear":[147],"Programming":[148],"(ILP)":[149],"meta-heuristic":[151],"Particle":[153],"Swarm":[154],"Optimization":[155],"(PSO)":[156],"been":[158,197,209],"proposed":[159,266,281,389],"core.":[165],"second":[168],"we":[170],"implemented":[172],"router":[174,238,310],"addressing":[175],"scheme,":[176],"routing":[177],"algorithm,":[178],"run-time":[179],"fault":[180],"injection":[181],"model,":[182],"using":[192],"Experiments":[195],"done":[198,210],"taking":[200],"different":[201],"multimedia":[202],"synthetic":[204],"benchmarks.":[206],"both":[212],"static":[213,224],"dynamic":[215,335],"simulation":[216,225],"environments":[217],"followed":[218],"hardware":[220,358],"implementation.":[221],"environment,":[226],"experimentations":[228],"carried":[230,273,305],"out":[231,274,306],"scaling":[233,276,308],"network":[235,278],"size":[236],"network.":[242],"The":[243],"results":[244],"obtained":[245],"from":[246],"our":[247,280,315,337,360],"approach":[248,316,338,361,390],"outperform":[249],"methods":[251],"such":[252],"as":[253],"Fault-tolerant":[254],"Spare":[255],"Core":[256],"Mapping":[257],"(FSCM),":[258],"Simulated":[259],"Annealing":[260],"(SA),":[261],"Genetic":[263],"Algorithm":[264],"(GA)":[265],"literature.":[269,397],"For":[270,302,333],"experiments":[272,304],"size,":[279],"methodology":[282],"shows":[283,317,339,362,384],"average":[285,341,364],"improvement":[286,319,342,365],"18.83%,":[288],"4.55%,":[289],"12.12%":[290],"cost":[293],"over":[294,325,348,375,391],"FSCM,":[297,328,351,381],"SA,":[298,329,352,378],"GA,":[300,331,354,379],"respectively.":[301,332,355,382],"network,":[314],"34.27%,":[321],"26.26%,":[322],"30.41%":[324],"simulations,":[336],"5.67%,":[344],"0.44%,":[345],"3.69%,":[347],"implementation,":[359],"5.38%,":[367],"7.45%,":[368],"27.10%":[369],"terms":[371],"runtime":[374],"superiority":[386],"presented":[394]},"counts_by_year":[{"year":2026,"cited_by_count":3},{"year":2025,"cited_by_count":4},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":4},{"year":2022,"cited_by_count":5},{"year":2021,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
