{"id":"https://openalex.org/W2800928021","doi":"https://doi.org/10.1109/access.2018.2833623","title":"VLSI Architecture for Novel Hopping Discrete Fourier Transform Computation","display_name":"VLSI Architecture for Novel Hopping Discrete Fourier Transform Computation","publication_year":2018,"publication_date":"2018-01-01","ids":{"openalex":"https://openalex.org/W2800928021","doi":"https://doi.org/10.1109/access.2018.2833623","mag":"2800928021"},"language":"en","primary_location":{"id":"doi:10.1109/access.2018.2833623","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2018.2833623","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1109/access.2018.2833623","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5062489518","display_name":"Wen-Ho Juang","orcid":"https://orcid.org/0000-0002-8220-8934"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":true,"raw_author_name":"Wen-Ho Juang","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan City, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan City, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5074441714","display_name":"Shin-Chi Lai","orcid":"https://orcid.org/0000-0003-0011-3649"},"institutions":[{"id":"https://openalex.org/I4210112569","display_name":"Nanhua University","ror":"https://ror.org/01tfbz441","country_code":"TW","type":"education","lineage":["https://openalex.org/I4210112569"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shin-Chi Lai","raw_affiliation_strings":["Department of Computer Science and Information Engineering, Nanhua University, Chiayi County, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Computer Science and Information Engineering, Nanhua University, Chiayi County, Taiwan","institution_ids":["https://openalex.org/I4210112569"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5114444457","display_name":"Ching\u2010Hsing Luo","orcid":"https://orcid.org/0000-0003-1152-0557"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Ching-Hsing Luo","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan City, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan City, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5015308343","display_name":"Shuenn-Yuh Lee","orcid":"https://orcid.org/0000-0002-9757-1410"},"institutions":[{"id":"https://openalex.org/I91807558","display_name":"National Cheng Kung University","ror":"https://ror.org/01b8kcc49","country_code":"TW","type":"education","lineage":["https://openalex.org/I91807558"]}],"countries":["TW"],"is_corresponding":false,"raw_author_name":"Shuenn-Yuh Lee","raw_affiliation_strings":["Department of Electrical Engineering, National Cheng Kung University, Tainan City, Taiwan"],"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, National Cheng Kung University, Tainan City, Taiwan","institution_ids":["https://openalex.org/I91807558"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":4,"corresponding_author_ids":["https://openalex.org/A5062489518"],"corresponding_institution_ids":["https://openalex.org/I91807558"],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":0.8257,"has_fulltext":false,"cited_by_count":10,"citation_normalized_percentile":{"value":0.725121,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"6","issue":null,"first_page":"30491","last_page":"30500"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T11034","display_name":"Digital Filter Design and Implementation","score":0.9991999864578247,"subfield":{"id":"https://openalex.org/subfields/1711","display_name":"Signal Processing"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11873","display_name":"PAPR reduction in OFDM","score":0.9966999888420105,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12300","display_name":"Advanced Electrical Measurement Techniques","score":0.9958999752998352,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.7306509017944336},{"id":"https://openalex.org/keywords/discrete-fourier-transform","display_name":"Discrete Fourier transform (general)","score":0.578510046005249},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.5718625783920288},{"id":"https://openalex.org/keywords/very-large-scale-integration","display_name":"Very-large-scale integration","score":0.5497617125511169},{"id":"https://openalex.org/keywords/adder","display_name":"Adder","score":0.5432151556015015},{"id":"https://openalex.org/keywords/lookup-table","display_name":"Lookup table","score":0.5387369990348816},{"id":"https://openalex.org/keywords/clock-rate","display_name":"Clock rate","score":0.5063871145248413},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.4743852913379669},{"id":"https://openalex.org/keywords/field-programmable-gate-array","display_name":"Field-programmable gate array","score":0.4565458297729492},{"id":"https://openalex.org/keywords/multiplier","display_name":"Multiplier (economics)","score":0.44506263732910156},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.41713446378707886},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.4167141318321228},{"id":"https://openalex.org/keywords/computation","display_name":"Computation","score":0.4148106575012207},{"id":"https://openalex.org/keywords/fast-fourier-transform","display_name":"Fast Fourier transform","score":0.414246141910553},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.3826022446155548},{"id":"https://openalex.org/keywords/fourier-transform","display_name":"Fourier transform","score":0.2952595055103302},{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.17542478442192078},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.15687623620033264},{"id":"https://openalex.org/keywords/fractional-fourier-transform","display_name":"Fractional Fourier transform","score":0.1505585014820099}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.7306509017944336},{"id":"https://openalex.org/C57733114","wikidata":"https://www.wikidata.org/wiki/Q1006032","display_name":"Discrete Fourier transform (general)","level":5,"score":0.578510046005249},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.5718625783920288},{"id":"https://openalex.org/C14580979","wikidata":"https://www.wikidata.org/wiki/Q876049","display_name":"Very-large-scale integration","level":2,"score":0.5497617125511169},{"id":"https://openalex.org/C164620267","wikidata":"https://www.wikidata.org/wiki/Q376953","display_name":"Adder","level":3,"score":0.5432151556015015},{"id":"https://openalex.org/C134835016","wikidata":"https://www.wikidata.org/wiki/Q690265","display_name":"Lookup table","level":2,"score":0.5387369990348816},{"id":"https://openalex.org/C178693496","wikidata":"https://www.wikidata.org/wiki/Q911691","display_name":"Clock rate","level":3,"score":0.5063871145248413},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.4743852913379669},{"id":"https://openalex.org/C42935608","wikidata":"https://www.wikidata.org/wiki/Q190411","display_name":"Field-programmable gate array","level":2,"score":0.4565458297729492},{"id":"https://openalex.org/C124584101","wikidata":"https://www.wikidata.org/wiki/Q1053266","display_name":"Multiplier (economics)","level":2,"score":0.44506263732910156},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.41713446378707886},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.4167141318321228},{"id":"https://openalex.org/C45374587","wikidata":"https://www.wikidata.org/wiki/Q12525525","display_name":"Computation","level":2,"score":0.4148106575012207},{"id":"https://openalex.org/C75172450","wikidata":"https://www.wikidata.org/wiki/Q623950","display_name":"Fast Fourier transform","level":2,"score":0.414246141910553},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.3826022446155548},{"id":"https://openalex.org/C102519508","wikidata":"https://www.wikidata.org/wiki/Q6520159","display_name":"Fourier transform","level":2,"score":0.2952595055103302},{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.17542478442192078},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.15687623620033264},{"id":"https://openalex.org/C76563020","wikidata":"https://www.wikidata.org/wiki/Q4817582","display_name":"Fractional Fourier transform","level":4,"score":0.1505585014820099},{"id":"https://openalex.org/C203024314","wikidata":"https://www.wikidata.org/wiki/Q1365258","display_name":"Fourier analysis","level":3,"score":0.0},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.0},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.0},{"id":"https://openalex.org/C139719470","wikidata":"https://www.wikidata.org/wiki/Q39680","display_name":"Macroeconomics","level":1,"score":0.0},{"id":"https://openalex.org/C134306372","wikidata":"https://www.wikidata.org/wiki/Q7754","display_name":"Mathematical analysis","level":1,"score":0.0},{"id":"https://openalex.org/C82876162","wikidata":"https://www.wikidata.org/wiki/Q17096504","display_name":"Latency (audio)","level":2,"score":0.0},{"id":"https://openalex.org/C162324750","wikidata":"https://www.wikidata.org/wiki/Q8134","display_name":"Economics","level":0,"score":0.0}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2018.2833623","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2018.2833623","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:c8daab7e8a92406b931920720eb08fbc","is_oa":true,"landing_page_url":"https://doaj.org/article/c8daab7e8a92406b931920720eb08fbc","pdf_url":null,"source":{"id":"https://openalex.org/S112646816","display_name":"SHILAP Revista de lepidopterolog\u00eda","issn_l":"0300-5267","issn":["0300-5267","2340-4078"],"is_oa":true,"is_in_doaj":true,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"journal"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 6, Pp 30491-30500 (2018)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2018.2833623","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2018.2833623","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G273609036","display_name":null,"funder_award_id":"106-2511-S-262-001","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G412021795","display_name":null,"funder_award_id":"106-2221-E-343-002","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"},{"id":"https://openalex.org/G877362273","display_name":null,"funder_award_id":"104-2221-E-343-003","funder_id":"https://openalex.org/F4320322795","funder_display_name":"Ministry of Science and Technology, Taiwan"}],"funders":[{"id":"https://openalex.org/F4320322589","display_name":"Taiwan Semiconductor Manufacturing Company","ror":"https://ror.org/02wx79d08"},{"id":"https://openalex.org/F4320322795","display_name":"Ministry of Science and Technology, Taiwan","ror":"https://ror.org/02kv4zf79"}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":21,"referenced_works":["https://openalex.org/W1499308624","https://openalex.org/W1499506103","https://openalex.org/W1501488688","https://openalex.org/W1697514459","https://openalex.org/W1766888123","https://openalex.org/W1990131646","https://openalex.org/W2025381053","https://openalex.org/W2028781454","https://openalex.org/W2031606204","https://openalex.org/W2106153340","https://openalex.org/W2127665203","https://openalex.org/W2132681676","https://openalex.org/W2145205610","https://openalex.org/W2148464077","https://openalex.org/W2156912108","https://openalex.org/W2247518014","https://openalex.org/W2294235300","https://openalex.org/W2344251239","https://openalex.org/W2550633324","https://openalex.org/W2734326052","https://openalex.org/W3109938142"],"related_works":["https://openalex.org/W4390550886","https://openalex.org/W3217463396","https://openalex.org/W2516396101","https://openalex.org/W2790557758","https://openalex.org/W3204929712","https://openalex.org/W4295102875","https://openalex.org/W2300671402","https://openalex.org/W2015457513","https://openalex.org/W4312888585","https://openalex.org/W2533938775"],"abstract_inverted_index":{"The":[0,54,134,154],"hopping":[1],"discrete":[2],"Fourier":[3],"transform":[4,27],"(HDFT)":[5],"is":[6,41],"a":[7,30,35,48,142],"new":[8],"method":[9,82],"applied":[10],"for":[11,47,105,132],"time-frequency":[12],"spectral":[13],"analysis":[14],"of":[15,21,68,86,157],"time-varying":[16],"signals.":[17],"In":[18],"the":[19,24,44,62,66,84,115,119,122,184],"implementation":[20],"HDFT":[22,49],"algorithms,":[23],"updating":[25],"vector":[26],"(UVT)":[28],"plays":[29],"key":[31],"role,":[32],"and":[33,51,71,76,95,118,129,163,172,202],"therefore":[34],"novel":[36],"recursive":[37,98],"DFT-based":[38],"UVT":[39],"formula":[40],"introduced":[42],"in":[43,195],"proposed":[45,63,123,135,185],"design":[46,124,186],"algorithm":[50,64],"its":[52],"architecture.":[53],"perceived":[55],"advantages":[56],"can":[57,138,147],"be":[58,139,188],"summarized":[59],"as:":[60],"1)":[61],"reduces":[65],"number":[67],"multiplications,":[69],"additions,":[70],"coefficients":[72],"by":[73,113,170],"42.3%,":[74],"33.3%,":[75],"50%,":[77],"respectively,":[78],"compared":[79,174],"with":[80,175],"Park's":[81],"under":[83],"settings":[85],"an":[87,96],"M-sample":[88],"complex":[89],"input":[90],"sequence":[91],"(M":[92],"=":[93,103,110],"256),":[94],"N-point":[97],"DFT":[99],"computation":[100],"scheme":[101,117],"(N":[102],"64)":[104],"time":[106],"hop":[107],"L":[108],"(L":[109],"4);":[111],"2)":[112],"adopting":[114],"hardware-sharing":[116],"register-shifting":[120],"concept,":[121],"only":[125],"takes":[126],"nine":[127],"multipliers":[128],"12":[130],"adders":[131],"realization.":[133],"hardware":[136],"accelerator":[137],"implemented":[140],"using":[141],"field-programmable":[143],"gate":[144],"array,":[145],"which":[146],"operate":[148],"at":[149],"48.33":[150],"MHz":[151],"clock":[152],"rate.":[153],"resource":[155],"utilization":[156],"combinational":[158],"logic":[159],"lookup":[160],"tables":[161],"(LUTs)":[162],"digital":[164],"signal":[165],"processing":[166],"(DSP)":[167],"blocks":[168],"reduced":[169],"11.7%":[171],"42.5%":[173],"Juang":[176],"et":[177],"al.'s":[178],"work.":[179],"For":[180],"very-large-scale":[181],"integration":[182],"realizations,":[183],"would":[187],"more":[189],"powerful":[190],"than":[191],"other":[192],"existing":[193],"algorithms":[194],"future":[196],"applications":[197],"focusing":[198],"on":[199],"DSP,":[200],"filtering,":[201],"communications.":[203]},"counts_by_year":[{"year":2024,"cited_by_count":1},{"year":2023,"cited_by_count":1},{"year":2022,"cited_by_count":3},{"year":2021,"cited_by_count":1},{"year":2020,"cited_by_count":1},{"year":2019,"cited_by_count":2},{"year":2018,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
