{"id":"https://openalex.org/W2763388467","doi":"https://doi.org/10.1109/access.2017.2761905","title":"High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure","display_name":"High-Isolation CMOS T/R Switch Design Using a Two-Stage Equivalent Transmission Line Structure","publication_year":2017,"publication_date":"2017-01-01","ids":{"openalex":"https://openalex.org/W2763388467","doi":"https://doi.org/10.1109/access.2017.2761905","mag":"2763388467"},"language":"en","primary_location":{"id":"doi:10.1109/access.2017.2761905","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2017.2761905","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"type":"article","indexed_in":["crossref","doaj"],"open_access":{"is_oa":true,"oa_status":"gold","oa_url":"https://doi.org/10.1109/access.2017.2761905","any_repository_has_fulltext":true},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5074584116","display_name":"Chenxi Zhao","orcid":"https://orcid.org/0000-0001-7166-2755"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Chenxi Zhao","raw_affiliation_strings":["Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China"],"raw_orcid":"https://orcid.org/0000-0001-7166-2755","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5034496532","display_name":"Yipeng Wu","orcid":"https://orcid.org/0000-0002-7328-3836"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yipeng Wu","raw_affiliation_strings":["Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5031578846","display_name":"Huihua Liu","orcid":"https://orcid.org/0000-0002-9146-7620"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Huihua Liu","raw_affiliation_strings":["Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5041364072","display_name":"Yunqiu Wu","orcid":"https://orcid.org/0000-0001-6856-7431"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yunqiu Wu","raw_affiliation_strings":["Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China","institution_ids":["https://openalex.org/I150229711"]}]},{"author_position":"last","author":{"id":null,"display_name":"Kai Kang","orcid":"https://orcid.org/0000-0003-0616-2994"},"institutions":[{"id":"https://openalex.org/I150229711","display_name":"University of Electronic Science and Technology of China","ror":"https://ror.org/04qr3zq92","country_code":"CN","type":"education","lineage":["https://openalex.org/I150229711"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Kai Kang","raw_affiliation_strings":["Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China"],"raw_orcid":"https://orcid.org/0000-0003-0616-2994","affiliations":[{"raw_affiliation_string":"Department of Electrical Engineering, University of Electronic Science and Technology of China, Chengdu, China","institution_ids":["https://openalex.org/I150229711"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":{"value":1850,"currency":"USD","value_usd":1850},"apc_paid":{"value":1850,"currency":"USD","value_usd":1850},"fwci":0.1462,"has_fulltext":false,"cited_by_count":3,"citation_normalized_percentile":{"value":0.52650473,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":95},"biblio":{"volume":"5","issue":null,"first_page":"22704","last_page":"22712"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10187","display_name":"Radio Frequency Integrated Circuit Design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12791","display_name":"Full-Duplex Wireless Communications","score":0.9995999932289124,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11444","display_name":"Electromagnetic Compatibility and Noise Suppression","score":0.9987999796867371,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/insertion-loss","display_name":"Insertion loss","score":0.7809792757034302},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.6764258146286011},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.6495629549026489},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.5479549765586853},{"id":"https://openalex.org/keywords/electric-power-transmission","display_name":"Electric power transmission","score":0.4944186210632324},{"id":"https://openalex.org/keywords/equivalent-series-resistance","display_name":"Equivalent series resistance","score":0.468568354845047},{"id":"https://openalex.org/keywords/transmitter","display_name":"Transmitter","score":0.466861754655838},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.4568091928958893},{"id":"https://openalex.org/keywords/inductance","display_name":"Inductance","score":0.4560645818710327},{"id":"https://openalex.org/keywords/transmission-line","display_name":"Transmission line","score":0.4458329975605011},{"id":"https://openalex.org/keywords/materials-science","display_name":"Materials science","score":0.42731738090515137},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.3385852575302124},{"id":"https://openalex.org/keywords/optoelectronics","display_name":"Optoelectronics","score":0.3338170349597931},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.32794758677482605},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.22634664177894592},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.1971207857131958},{"id":"https://openalex.org/keywords/channel","display_name":"Channel (broadcasting)","score":0.12874320149421692}],"concepts":[{"id":"https://openalex.org/C90327742","wikidata":"https://www.wikidata.org/wiki/Q947396","display_name":"Insertion loss","level":2,"score":0.7809792757034302},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.6764258146286011},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.6495629549026489},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.5479549765586853},{"id":"https://openalex.org/C140311924","wikidata":"https://www.wikidata.org/wiki/Q200928","display_name":"Electric power transmission","level":2,"score":0.4944186210632324},{"id":"https://openalex.org/C14485415","wikidata":"https://www.wikidata.org/wiki/Q5384730","display_name":"Equivalent series resistance","level":3,"score":0.468568354845047},{"id":"https://openalex.org/C47798520","wikidata":"https://www.wikidata.org/wiki/Q190157","display_name":"Transmitter","level":3,"score":0.466861754655838},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.4568091928958893},{"id":"https://openalex.org/C29210110","wikidata":"https://www.wikidata.org/wiki/Q177897","display_name":"Inductance","level":3,"score":0.4560645818710327},{"id":"https://openalex.org/C33441834","wikidata":"https://www.wikidata.org/wiki/Q693004","display_name":"Transmission line","level":2,"score":0.4458329975605011},{"id":"https://openalex.org/C192562407","wikidata":"https://www.wikidata.org/wiki/Q228736","display_name":"Materials science","level":0,"score":0.42731738090515137},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.3385852575302124},{"id":"https://openalex.org/C49040817","wikidata":"https://www.wikidata.org/wiki/Q193091","display_name":"Optoelectronics","level":1,"score":0.3338170349597931},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.32794758677482605},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.22634664177894592},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.1971207857131958},{"id":"https://openalex.org/C127162648","wikidata":"https://www.wikidata.org/wiki/Q16858953","display_name":"Channel (broadcasting)","level":2,"score":0.12874320149421692}],"mesh":[],"locations_count":2,"locations":[{"id":"doi:10.1109/access.2017.2761905","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2017.2761905","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},{"id":"pmh:oai:doaj.org/article:b40bef9c4d0445ada14d01af4cc35b6c","is_oa":true,"landing_page_url":"https://doaj.org/article/b40bef9c4d0445ada14d01af4cc35b6c","pdf_url":null,"source":{"id":"https://openalex.org/S4306401280","display_name":"DOAJ (DOAJ: Directory of Open Access Journals)","issn_l":null,"issn":null,"is_oa":false,"is_in_doaj":false,"is_core":false,"host_organization":null,"host_organization_name":null,"host_organization_lineage":[],"host_organization_lineage_names":[],"type":"repository"},"license":"cc-by-sa","license_id":"https://openalex.org/licenses/cc-by-sa","version":"submittedVersion","is_accepted":false,"is_published":false,"raw_source_name":"IEEE Access, Vol 5, Pp 22704-22712 (2017)","raw_type":"article"}],"best_oa_location":{"id":"doi:10.1109/access.2017.2761905","is_oa":true,"landing_page_url":"https://doi.org/10.1109/access.2017.2761905","pdf_url":null,"source":{"id":"https://openalex.org/S2485537415","display_name":"IEEE Access","issn_l":"2169-3536","issn":["2169-3536"],"is_oa":true,"is_in_doaj":true,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Access","raw_type":"journal-article"},"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8799999952316284}],"awards":[{"id":"https://openalex.org/G8297874081","display_name":null,"funder_award_id":"ZYGX2015KYQD006","funder_id":"https://openalex.org/F4320335787","funder_display_name":"Fundamental Research Funds for the Central Universities"}],"funders":[{"id":"https://openalex.org/F4320335787","display_name":"Fundamental Research Funds for the Central Universities","ror":null}],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":30,"referenced_works":["https://openalex.org/W1594101521","https://openalex.org/W1968018528","https://openalex.org/W1984281323","https://openalex.org/W1998284495","https://openalex.org/W2010973186","https://openalex.org/W2017461892","https://openalex.org/W2052139913","https://openalex.org/W2063980579","https://openalex.org/W2092091566","https://openalex.org/W2114146482","https://openalex.org/W2131405741","https://openalex.org/W2131423257","https://openalex.org/W2137135623","https://openalex.org/W2137817610","https://openalex.org/W2151703777","https://openalex.org/W2154054983","https://openalex.org/W2168293832","https://openalex.org/W2168301369","https://openalex.org/W2170237053","https://openalex.org/W2172131066","https://openalex.org/W2286228269","https://openalex.org/W2333735281","https://openalex.org/W2350373939","https://openalex.org/W2592983661","https://openalex.org/W2606743650","https://openalex.org/W2609391138","https://openalex.org/W2612303915","https://openalex.org/W2666587559","https://openalex.org/W2739266280","https://openalex.org/W2763535652"],"related_works":["https://openalex.org/W2060249924","https://openalex.org/W1604868505","https://openalex.org/W2146388118","https://openalex.org/W2910497265","https://openalex.org/W3115307632","https://openalex.org/W4255886484","https://openalex.org/W787855002","https://openalex.org/W2949628984","https://openalex.org/W2096055231","https://openalex.org/W3109294920"],"abstract_inverted_index":{"A":[0,40,59],"fully":[1,163],"integrated":[2,164],"Ku-band":[3],"transmit/receive":[4],"(T/R)":[5],"switch":[6,66,79,139],"based":[7],"on":[8],"a":[9,19,28,49,120],"two-stage":[10],"equivalent":[11],"transmission":[12],"line":[13],"structure":[14,42],"has":[15],"been":[16],"designed":[17],"using":[18],"180-nm":[20],"complementary":[21],"metal-oxide-semiconductor":[22],"(CMOS)":[23],"process.":[24],"An":[25],"analysis":[26],"shows":[27],"relation":[29],"between":[30],"the":[31,53,57,65,78,81,99,151],"series":[32,71],"inductance":[33],"and":[34,84,91,101,108,145],"turn-on":[35],"resistance":[36],"for":[37,160],"high":[38],"isolation.":[39],"stack":[41],"with":[43,150],"feed-forward":[44],"capacitors":[45],"was":[46,67],"chosen":[47],"as":[48],"means":[50],"of":[51,56,64,77,132,153],"improving":[52],"power-handling":[54,146],"capability":[55,147,152],"switch.":[58],"low":[60],"insertion":[61,143],"loss":[62],"(IL)":[63],"achieved":[68],"by":[69],"eliminating":[70],"transistors.":[72],"The":[73,95,117,138],"measured":[74,96,121],"minimum":[75],"ILs":[76],"in":[80,98,162],"transmitter":[82],"(TX)":[83],"receiver":[85],"(RX)":[86],"modes":[87,103],"are":[88,104],"2.7":[89],"dB":[90],"2.3":[92],"dB,":[93,110],"respectively.":[94],"isolations":[97],"TX":[100],"RX":[102],"greater":[105],"than":[106],"34":[107],"25":[109],"respectively,":[111],"from":[112],"15":[113],"to":[114],"18":[115],"GHz.":[116,137],"design":[118],"reaches":[119],"input":[122],"1-dB":[123],"power":[124],"compression":[125],"point":[126],"(IP":[127],"<sub":[128],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[129],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">1</sub>":[130],"dB)":[131],"22":[133],"dBm":[134],"at":[135],"17":[136],"achieves":[140],"stringent":[141],"isolation,":[142],"loss,":[144],"requirements":[148],"along":[149],"full":[154],"integration,":[155],"demonstrating":[156],"its":[157],"great":[158],"potential":[159],"use":[161],"CMOS":[165],"T/R":[166],"chips.":[167]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":1},{"year":2019,"cited_by_count":1}],"updated_date":"2026-06-11T09:08:48.828518","created_date":"2025-10-10T00:00:00"}