{"id":"https://openalex.org/W4406895450","doi":"https://doi.org/10.1109/a-sscc60305.2024.10849257","title":"A 280.580 \u03bcm<sup>2</sup>/Grid, 30.7pJ TMRA-PIM (Time-Multiplexed Random-Access Processing-in-Memory) Programmable Accelerator for Partial Differential Equations Solving and Edge Processing","display_name":"A 280.580 \u03bcm<sup>2</sup>/Grid, 30.7pJ TMRA-PIM (Time-Multiplexed Random-Access Processing-in-Memory) Programmable Accelerator for Partial Differential Equations Solving and Edge Processing","publication_year":2024,"publication_date":"2024-11-18","ids":{"openalex":"https://openalex.org/W4406895450","doi":"https://doi.org/10.1109/a-sscc60305.2024.10849257"},"language":"en","primary_location":{"id":"doi:10.1109/a-sscc60305.2024.10849257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/a-sscc60305.2024.10849257","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"},"type":"conference-paper","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5109003425","display_name":"Zhengzhe Wei","orcid":null},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Zhengzhe Wei","raw_affiliation_strings":["Nanyang Technological University,Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanyang Technological University,Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111102781","display_name":"Yuqi Su","orcid":null},"institutions":[{"id":"https://openalex.org/I20231570","display_name":"Peking University","ror":"https://ror.org/02v51f717","country_code":"CN","type":"education","lineage":["https://openalex.org/I20231570"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Yuqi Su","raw_affiliation_strings":["Peking University,Key Lab IMC2,China"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Peking University,Key Lab IMC2,China","institution_ids":["https://openalex.org/I20231570"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5076628109","display_name":"Tony Tae-Hyoung Kim","orcid":"https://orcid.org/0000-0002-1779-1799"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Tony Tae-Hyoung Kim","raw_affiliation_strings":["Nanyang Technological University,Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanyang Technological University,Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5016044907","display_name":"Yuanjin Zheng","orcid":"https://orcid.org/0000-0002-5768-367X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Yuanjin Zheng","raw_affiliation_strings":["Nanyang Technological University,Singapore"],"raw_orcid":null,"affiliations":[{"raw_affiliation_string":"Nanyang Technological University,Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":2,"institutions_distinct_count":2,"corresponding_author_ids":[],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":0.9271,"has_fulltext":false,"cited_by_count":1,"citation_normalized_percentile":{"value":0.75409836,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":91,"max":95},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9466999769210815,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9466999769210815,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11417","display_name":"Advancements in PLL and VCO Technologies","score":0.9279000163078308,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9182000160217285,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6504344940185547},{"id":"https://openalex.org/keywords/multiplexing","display_name":"Multiplexing","score":0.6040282845497131},{"id":"https://openalex.org/keywords/enhanced-data-rates-for-gsm-evolution","display_name":"Enhanced Data Rates for GSM Evolution","score":0.4877934753894806},{"id":"https://openalex.org/keywords/grid","display_name":"Grid","score":0.45957255363464355},{"id":"https://openalex.org/keywords/random-access-memory","display_name":"Random access memory","score":0.43669500946998596},{"id":"https://openalex.org/keywords/signal-processing","display_name":"Signal processing","score":0.42204537987709045},{"id":"https://openalex.org/keywords/parallel-computing","display_name":"Parallel computing","score":0.4205136001110077},{"id":"https://openalex.org/keywords/computational-science","display_name":"Computational science","score":0.4116383194923401},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.323544979095459},{"id":"https://openalex.org/keywords/mathematics","display_name":"Mathematics","score":0.13566851615905762},{"id":"https://openalex.org/keywords/digital-signal-processing","display_name":"Digital signal processing","score":0.1245892345905304},{"id":"https://openalex.org/keywords/artificial-intelligence","display_name":"Artificial intelligence","score":0.10267329216003418},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.09241616725921631}],"concepts":[{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6504344940185547},{"id":"https://openalex.org/C19275194","wikidata":"https://www.wikidata.org/wiki/Q222903","display_name":"Multiplexing","level":2,"score":0.6040282845497131},{"id":"https://openalex.org/C162307627","wikidata":"https://www.wikidata.org/wiki/Q204833","display_name":"Enhanced Data Rates for GSM Evolution","level":2,"score":0.4877934753894806},{"id":"https://openalex.org/C187691185","wikidata":"https://www.wikidata.org/wiki/Q2020720","display_name":"Grid","level":2,"score":0.45957255363464355},{"id":"https://openalex.org/C2994168587","wikidata":"https://www.wikidata.org/wiki/Q5295","display_name":"Random access memory","level":2,"score":0.43669500946998596},{"id":"https://openalex.org/C104267543","wikidata":"https://www.wikidata.org/wiki/Q208163","display_name":"Signal processing","level":3,"score":0.42204537987709045},{"id":"https://openalex.org/C173608175","wikidata":"https://www.wikidata.org/wiki/Q232661","display_name":"Parallel computing","level":1,"score":0.4205136001110077},{"id":"https://openalex.org/C459310","wikidata":"https://www.wikidata.org/wiki/Q117801","display_name":"Computational science","level":1,"score":0.4116383194923401},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.323544979095459},{"id":"https://openalex.org/C33923547","wikidata":"https://www.wikidata.org/wiki/Q395","display_name":"Mathematics","level":0,"score":0.13566851615905762},{"id":"https://openalex.org/C84462506","wikidata":"https://www.wikidata.org/wiki/Q173142","display_name":"Digital signal processing","level":2,"score":0.1245892345905304},{"id":"https://openalex.org/C154945302","wikidata":"https://www.wikidata.org/wiki/Q11660","display_name":"Artificial intelligence","level":1,"score":0.10267329216003418},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.09241616725921631},{"id":"https://openalex.org/C2524010","wikidata":"https://www.wikidata.org/wiki/Q8087","display_name":"Geometry","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/a-sscc60305.2024.10849257","is_oa":false,"landing_page_url":"https://doi.org/10.1109/a-sscc60305.2024.10849257","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2024 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6000000238418579,"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7"}],"awards":[],"funders":[],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2890791469","https://openalex.org/W2078091825","https://openalex.org/W4251457771","https://openalex.org/W3023382193","https://openalex.org/W2884173634","https://openalex.org/W4321260179","https://openalex.org/W2508639893","https://openalex.org/W2473841733","https://openalex.org/W3008427980","https://openalex.org/W2018636102"],"abstract_inverted_index":{"Hardware":[0],"accelerators":[1],"[1\u20133]":[2],"employing":[3],"processing-in-memory":[4],"(PIM)":[5],"techniques":[6],"for":[7,55,198],"solving":[8],"partial":[9],"differential":[10],"equations":[11],"(PDEs)":[12],"using":[13,76,156],"finite":[14],"difference":[15],"(FD)":[16],"have":[17],"received":[18],"increasing":[19],"attention":[20],"thanks":[21],"to":[22,62,204],"their":[23],"significant":[24],"energy":[25],"efficiency":[26,193],"and":[27,36,53,123,134,142,167,174,188,242],"low":[28,37],"latency.":[29,84,143],"However,":[30],"a":[31,63,77,87,101,114,157,207,217,223,243],"trilemma":[32],"among":[33],"density,":[34],"programmability,":[35,66],"latency":[38,52],"hinders":[39],"the":[40,72,202],"practical":[41],"use":[42],"of":[43,65,74,107,119,210,225],"such":[44,129],"an":[45,148],"accelerator.":[46],"The":[47,213],"accelerator":[48,117],"must":[49],"compromise":[50],"its":[51],"programmability":[54],"better":[56],"density.":[57],"For":[58],"instance,":[59],"in":[60,69,89,136],"addition":[61],"lack":[64],"prior":[67],"work":[68],"[2]":[70],"enhances":[71],"density":[73,224],"[1]":[75],"processing-near-memory":[78],"architecture":[79],"that":[80],"compromises":[81],"memory":[82,184],"access":[83],"In":[85,109],"contrast,":[86],"design":[88],"[3]":[90],"utilized":[91],"RISC":[92],"CPU":[93],"cores":[94],"as":[95,130],"programable":[96],"processing":[97,127],"elements":[98],"(PEs)":[99],"with":[100,139,147,222],"normalized":[102],"area":[103,141,192,221],"overhead":[104],"$\\gt300":[105],"\\mathrm{x}$":[106],"[2].":[108],"this":[110],"work,":[111],"we":[112],"propose":[113],"programmable":[115],"PDE":[116],"capable":[118],"both":[120],"scientific":[121],"computing":[122,246],"ultra-low":[124],"power":[125],"edge":[126],"tasks":[128,200],"trajectory":[131],"error":[132],"correction":[133],"pathfinding":[135],"robotics":[137],"applications":[138],"minimized":[140],"A":[144],"test":[145,214],"chip":[146,215],"$11":[149],"\\times":[150],"22$":[151],"PE":[152,163,180],"array":[153],"is":[154],"fabricated":[155],"TSMC":[158],"40nm":[159],"LP":[160],"technology.":[161],"Each":[162,177],"performs":[164],"instruction":[165],"decode":[166],"execution":[168],"via":[169],"clock":[170,172],"throttling,":[171],"gating":[173],"data-path":[175],"reconfiguration.":[176],"executor":[178],"within":[179],"multiplexes":[181],"between":[182],"two":[183],"groups":[185],"featuring":[186],"static":[187],"dynamic":[189],"memory,":[190],"maximizing":[191],"while":[194],"preserving":[195],"full":[196],"functionality":[197],"PIM":[199],"including":[201],"ability":[203],"operate":[205],"at":[206,237],"minimum":[208],"frequency":[209],"0.187":[211],"MHz.":[212],"occupies":[216],"$0.1358":[218],"\\mathrm{~mm}^{2}$":[219],"core":[220],"$280.580~":[226],"\\mu":[227,234],"\\mathrm{m}^{2}$":[228],"per":[229],"grid":[230],"point,":[231],"consumes":[232],"$114.97~":[233],"\\mathrm{W}$":[235],"operating":[236],"$0.78":[238],"\\mathrm{~V},":[239],"3":[240],"\\mathrm{MHz}$,":[241],"12":[244],"-bit":[245],"precision.":[247]},"counts_by_year":[{"year":2025,"cited_by_count":1}],"updated_date":"2026-07-29T14:22:42.915294","created_date":"2025-10-10T00:00:00"}
