{"id":"https://openalex.org/W4389880279","doi":"https://doi.org/10.1109/a-sscc58667.2023.10347981","title":"An 83.6dB-SNDR 101.6dB-SFDR 4<sup>th</sup>-Order Noise-Shaping SAR with 2<sup>nd</sup>-Order Nonlinearity Error Shaping","display_name":"An 83.6dB-SNDR 101.6dB-SFDR 4<sup>th</sup>-Order Noise-Shaping SAR with 2<sup>nd</sup>-Order Nonlinearity Error Shaping","publication_year":2023,"publication_date":"2023-11-05","ids":{"openalex":"https://openalex.org/W4389880279","doi":"https://doi.org/10.1109/a-sscc58667.2023.10347981"},"language":"en","primary_location":{"id":"doi:10.1109/a-sscc58667.2023.10347981","is_oa":false,"landing_page_url":"https://doi.org/10.1109/a-sscc58667.2023.10347981","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100732248","display_name":"Yanbo Zhang","orcid":"https://orcid.org/0000-0002-7627-488X"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":true,"raw_author_name":"Yanbo Zhang","raw_affiliation_strings":["School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100744352","display_name":"Xianghui Zhang","orcid":"https://orcid.org/0000-0002-6265-8719"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Xianghui Zhang","raw_affiliation_strings":["School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100777335","display_name":"Li Tian","orcid":"https://orcid.org/0000-0002-3289-5289"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Li Tian","raw_affiliation_strings":["School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100635138","display_name":"Shubin Liu","orcid":"https://orcid.org/0000-0002-9942-0069"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Shubin Liu","raw_affiliation_strings":["School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China","institution_ids":["https://openalex.org/I149594827"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5039575274","display_name":"Zhangming Zhu","orcid":"https://orcid.org/0000-0002-7764-1928"},"institutions":[{"id":"https://openalex.org/I149594827","display_name":"Xidian University","ror":"https://ror.org/05s92vm98","country_code":"CN","type":"education","lineage":["https://openalex.org/I149594827"]}],"countries":["CN"],"is_corresponding":false,"raw_author_name":"Zhangming Zhu","raw_affiliation_strings":["School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China"],"affiliations":[{"raw_affiliation_string":"School of Microelectronics, Xidian University,Key Laboratory of Analog Integrated Circuits and Systems (Ministry of Education),Xi&#x0027;an,China","institution_ids":["https://openalex.org/I149594827"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":5,"corresponding_author_ids":["https://openalex.org/A5100732248"],"corresponding_institution_ids":["https://openalex.org/I149594827"],"apc_list":null,"apc_paid":null,"fwci":0.45,"has_fulltext":false,"cited_by_count":4,"citation_normalized_percentile":{"value":0.59337483,"is_in_top_1_percent":false,"is_in_top_10_percent":false},"cited_by_percentile_year":{"min":90,"max":97},"biblio":{"volume":null,"issue":null,"first_page":"1","last_page":"3"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10323","display_name":"Analog and Mixed-Signal Circuit Design","score":0.9994999766349792,"subfield":{"id":"https://openalex.org/subfields/2204","display_name":"Biomedical Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11992","display_name":"CCD and CMOS Imaging Sensors","score":0.9979000091552734,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10558","display_name":"Advancements in Semiconductor Devices and Circuit Design","score":0.9976000189781189,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/spurious-free-dynamic-range","display_name":"Spurious-free dynamic range","score":0.8217247724533081},{"id":"https://openalex.org/keywords/integral-nonlinearity","display_name":"Integral nonlinearity","score":0.8145933747291565},{"id":"https://openalex.org/keywords/differential-nonlinearity","display_name":"Differential nonlinearity","score":0.6258319020271301},{"id":"https://openalex.org/keywords/capacitor","display_name":"Capacitor","score":0.5066707730293274},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.4759119153022766},{"id":"https://openalex.org/keywords/least-significant-bit","display_name":"Least significant bit","score":0.448537141084671},{"id":"https://openalex.org/keywords/quantization","display_name":"Quantization (signal processing)","score":0.4453398883342743},{"id":"https://openalex.org/keywords/noise-shaping","display_name":"Noise shaping","score":0.4293263256549835},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.3721016049385071},{"id":"https://openalex.org/keywords/physics","display_name":"Physics","score":0.32977378368377686},{"id":"https://openalex.org/keywords/cmos","display_name":"CMOS","score":0.3142377436161041},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.2942621111869812},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.2654308080673218},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.21670958399772644},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.13323000073432922}],"concepts":[{"id":"https://openalex.org/C119293636","wikidata":"https://www.wikidata.org/wiki/Q657480","display_name":"Spurious-free dynamic range","level":3,"score":0.8217247724533081},{"id":"https://openalex.org/C130829357","wikidata":"https://www.wikidata.org/wiki/Q1665386","display_name":"Integral nonlinearity","level":4,"score":0.8145933747291565},{"id":"https://openalex.org/C71217194","wikidata":"https://www.wikidata.org/wiki/Q575958","display_name":"Differential nonlinearity","level":3,"score":0.6258319020271301},{"id":"https://openalex.org/C52192207","wikidata":"https://www.wikidata.org/wiki/Q5322","display_name":"Capacitor","level":3,"score":0.5066707730293274},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.4759119153022766},{"id":"https://openalex.org/C4305246","wikidata":"https://www.wikidata.org/wiki/Q3885225","display_name":"Least significant bit","level":2,"score":0.448537141084671},{"id":"https://openalex.org/C28855332","wikidata":"https://www.wikidata.org/wiki/Q198099","display_name":"Quantization (signal processing)","level":2,"score":0.4453398883342743},{"id":"https://openalex.org/C9083635","wikidata":"https://www.wikidata.org/wiki/Q2133535","display_name":"Noise shaping","level":2,"score":0.4293263256549835},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.3721016049385071},{"id":"https://openalex.org/C121332964","wikidata":"https://www.wikidata.org/wiki/Q413","display_name":"Physics","level":0,"score":0.32977378368377686},{"id":"https://openalex.org/C46362747","wikidata":"https://www.wikidata.org/wiki/Q173431","display_name":"CMOS","level":2,"score":0.3142377436161041},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.2942621111869812},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.2654308080673218},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.21670958399772644},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.13323000073432922},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.0},{"id":"https://openalex.org/C2778422915","wikidata":"https://www.wikidata.org/wiki/Q10302051","display_name":"Converters","level":3,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/a-sscc58667.2023.10347981","is_oa":false,"landing_page_url":"https://doi.org/10.1109/a-sscc58667.2023.10347981","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2023 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[],"awards":[{"id":"https://openalex.org/G3060695458","display_name":null,"funder_award_id":"62204192,92164301,62261160649,62021004","funder_id":"https://openalex.org/F4320321001","funder_display_name":"National Natural Science Foundation of China"}],"funders":[{"id":"https://openalex.org/F4320321001","display_name":"National Natural Science Foundation of China","ror":"https://ror.org/01h0zpd94"}],"has_content":{"pdf":false,"grobid_xml":false},"content_urls":null,"referenced_works_count":5,"referenced_works":["https://openalex.org/W2100427892","https://openalex.org/W2289098659","https://openalex.org/W2593067874","https://openalex.org/W3015386793","https://openalex.org/W4200003898"],"related_works":["https://openalex.org/W2896282852","https://openalex.org/W2139520010","https://openalex.org/W2025217054","https://openalex.org/W3090646127","https://openalex.org/W2027800196","https://openalex.org/W2019115495","https://openalex.org/W3150934930","https://openalex.org/W2352379926","https://openalex.org/W2074089090","https://openalex.org/W2188360899"],"abstract_inverted_index":{"The":[0,95,133,215],"Noise-Shaping":[1],"SAR":[2,259],"(NS-SAR)":[3],"is":[4,28,49,60,176,186],"a":[5,151,157,256,296],"promising":[6],"ADC":[7],"architecture":[8,260],"for":[9,150,213],"Internet-of-Everything":[10],"systems":[11],"owing":[12],"to":[13,51,63,80,85,179,190,248,272],"its":[14,86],"high":[15,152,207],"resolution":[16,154,193],"and":[17,37,65,102,123,194,233,281],"low":[18,146],"power":[19],"[1].":[20],"Nevertheless,":[21],"further":[22],"precision":[23],"improvement":[24],"of":[25,136,182,243],"NSSAR":[26],"ADCs":[27],"limited,":[29],"suffering":[30,162],"from":[31,163],"nonlinearity":[32,251,287],"caused":[33],"by":[34,219],"capacitor":[35,160,198],"mismatch":[36,54,68,129,174],"voltage-dependent":[38],"top-plate":[39],"parasitic":[40],"capacitance":[41],"<tex":[42,165,230,264,276,283],"xmlns:mml=\"http://www.w3.org/1998/Math/MathML\"":[43,166,231,265,277,284],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$(\\mathrm{C}_{\\text{par}})$</tex>":[44],".":[45],"Data-weighted":[46],"averaging":[47],"(DWA)":[48],"used":[50],"address":[52],"the":[53,58,66,73,81,92,106,114,141,145,164,170,173,180,183,196,201,224,229,235,239,245,250,275,282],"issue":[55,109],"[2].":[56],"However,":[57,144,206],"DWA":[59,74,99,122],"only":[61],"applied":[62],"MSB-DACs,":[64],"LSB-DACs":[67,103],"still":[69],"restricts":[70],"SFDR.":[71],"Meanwhile,":[72],"could":[75],"not":[76],"be":[77],"easily":[78],"extended":[79],"entire":[82],"DAC":[83,93,115,142,153,192],"due":[84],"hardware":[87,134],"complexity":[88,135],"exponentially":[89],"growing":[90],"with":[91,121,128,140],"resolution.":[94,143],"segmentation":[96],"method":[97],"employing":[98],"on":[100,223],"MSB-DACs":[101],"individually":[104],"has":[105],"gain":[107,221],"error":[108,130,175,288],"[3].":[110],"Ref.":[111],"[4\u20136]":[112],"separate":[113],"into":[116],"an":[117,124,187],"M-bit":[118],"thermometer-coded":[119],"MSB-DAC":[120],"N-bit":[125],"binary-weighted":[126],"LSB-DAC":[127],"shaping":[131,289],"(MES).":[132],"MES":[137],"grows":[138],"linearly":[139],"quantization":[147,268],"noise":[148,204],"calls":[149],"resulting":[155],"in":[156],"small":[158],"unit":[159,197],"while":[161],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$\\mathrm{C}_{\\text{par}}$</tex>":[167,232],"error.":[168],"On":[169],"other":[171],"hand,":[172],"inversely":[177],"proportional":[178],"size":[181,199],"capacitor.":[184],"NS":[185,208,269],"appropriate":[188],"way":[189],"shrink":[191],"increase":[195],"under":[200],"same":[202],"kT/C":[203],"budget.":[205],"efficiency":[209],"needs":[210],"active":[211],"amplifiers":[212],"compensation.":[214],"large-sized":[216],"devices":[217],"required":[218],"large":[220],"connect":[222],"top":[225],"plate,":[226],"which":[227],"enlarges":[228],"worsens":[234],"linearity.":[236],"To":[237],"overcome":[238],"constraints":[240],"above,":[241],"instead":[242],"adopting":[244],"dedicated":[246],"effort":[247],"handle":[249],"error,":[252],"this":[253],"work":[254],"presents":[255],"multi-stage-noise-shaping":[257],"(MASH)":[258],"that":[261],"cascades":[262],"two":[263],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$2^{\\mathrm{n}\\mathrm{d}}$</tex>":[266],"-order":[267,279,286],"(QNS)":[270],"stages":[271],"incorporate":[273],"together":[274],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$4^{\\mathrm{t}\\mathrm{h}}$</tex>":[278],"QNS":[280],"xmlns:xlink=\"http://www.w3.org/1999/xlink\">$2^{\\text{nd}}$</tex>":[285],"(NES).":[290],"Our":[291],"prototype":[292],"achieves":[293],">100dB-SFDR":[294],"over":[295],"62.5kHz":[297],"bandwidth":[298],"(BW).":[299]},"counts_by_year":[{"year":2025,"cited_by_count":3},{"year":2024,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
