{"id":"https://openalex.org/W3015887053","doi":"https://doi.org/10.1109/a-sscc47793.2019.9056926","title":"A 16K SRAM-Based Mixed-Signal In-Memory Computing Macro Featuring Voltage-Mode Accumulator and Row-by-Row ADC","display_name":"A 16K SRAM-Based Mixed-Signal In-Memory Computing Macro Featuring Voltage-Mode Accumulator and Row-by-Row ADC","publication_year":2019,"publication_date":"2019-11-01","ids":{"openalex":"https://openalex.org/W3015887053","doi":"https://doi.org/10.1109/a-sscc47793.2019.9056926","mag":"3015887053"},"language":"en","primary_location":{"id":"doi:10.1109/a-sscc47793.2019.9056926","is_oa":false,"landing_page_url":"https://doi.org/10.1109/a-sscc47793.2019.9056926","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5100706959","display_name":"Hyunjoon Kim","orcid":"https://orcid.org/0000-0001-9906-073X"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":true,"raw_author_name":"Hyunjoon Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"middle","author":{"id":"https://openalex.org/A5100428444","display_name":"Qian Chen","orcid":"https://orcid.org/0000-0001-9930-2903"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Qian Chen","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]},{"author_position":"last","author":{"id":"https://openalex.org/A5035469250","display_name":"Bongjin Kim","orcid":"https://orcid.org/0000-0001-5397-9628"},"institutions":[{"id":"https://openalex.org/I172675005","display_name":"Nanyang Technological University","ror":"https://ror.org/02e7b5302","country_code":"SG","type":"education","lineage":["https://openalex.org/I172675005"]}],"countries":["SG"],"is_corresponding":false,"raw_author_name":"Bongjin Kim","raw_affiliation_strings":["School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore"],"affiliations":[{"raw_affiliation_string":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore","institution_ids":["https://openalex.org/I172675005"]}]}],"institutions":[],"countries_distinct_count":1,"institutions_distinct_count":3,"corresponding_author_ids":["https://openalex.org/A5100706959"],"corresponding_institution_ids":["https://openalex.org/I172675005"],"apc_list":null,"apc_paid":null,"fwci":2.8615,"has_fulltext":false,"cited_by_count":37,"citation_normalized_percentile":{"value":0.91408939,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":91,"max":99},"biblio":{"volume":null,"issue":null,"first_page":"35","last_page":"36"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10502","display_name":"Advanced Memory and Neural Computing","score":1.0,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T12808","display_name":"Ferroelectric and Negative Capacitance Devices","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10472","display_name":"Semiconductor materials and devices","score":0.9983999729156494,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/static-random-access-memory","display_name":"Static random-access memory","score":0.7631508708000183},{"id":"https://openalex.org/keywords/accumulator","display_name":"Accumulator (cryptography)","score":0.6619629859924316},{"id":"https://openalex.org/keywords/voltage","display_name":"Voltage","score":0.5993127226829529},{"id":"https://openalex.org/keywords/xnor-gate","display_name":"XNOR gate","score":0.5606355667114258},{"id":"https://openalex.org/keywords/macro","display_name":"Macro","score":0.5227653980255127},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.49022895097732544},{"id":"https://openalex.org/keywords/electronic-engineering","display_name":"Electronic engineering","score":0.4553433656692505},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4434187114238739},{"id":"https://openalex.org/keywords/computer-hardware","display_name":"Computer hardware","score":0.3723064064979553},{"id":"https://openalex.org/keywords/electrical-engineering","display_name":"Electrical engineering","score":0.31021708250045776},{"id":"https://openalex.org/keywords/transistor","display_name":"Transistor","score":0.24803012609481812},{"id":"https://openalex.org/keywords/engineering","display_name":"Engineering","score":0.22688516974449158},{"id":"https://openalex.org/keywords/algorithm","display_name":"Algorithm","score":0.101056307554245}],"concepts":[{"id":"https://openalex.org/C68043766","wikidata":"https://www.wikidata.org/wiki/Q267416","display_name":"Static random-access memory","level":2,"score":0.7631508708000183},{"id":"https://openalex.org/C2078106","wikidata":"https://www.wikidata.org/wiki/Q14906620","display_name":"Accumulator (cryptography)","level":2,"score":0.6619629859924316},{"id":"https://openalex.org/C165801399","wikidata":"https://www.wikidata.org/wiki/Q25428","display_name":"Voltage","level":2,"score":0.5993127226829529},{"id":"https://openalex.org/C57684291","wikidata":"https://www.wikidata.org/wiki/Q1336142","display_name":"XNOR gate","level":4,"score":0.5606355667114258},{"id":"https://openalex.org/C166955791","wikidata":"https://www.wikidata.org/wiki/Q629579","display_name":"Macro","level":2,"score":0.5227653980255127},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.49022895097732544},{"id":"https://openalex.org/C24326235","wikidata":"https://www.wikidata.org/wiki/Q126095","display_name":"Electronic engineering","level":1,"score":0.4553433656692505},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4434187114238739},{"id":"https://openalex.org/C9390403","wikidata":"https://www.wikidata.org/wiki/Q3966","display_name":"Computer hardware","level":1,"score":0.3723064064979553},{"id":"https://openalex.org/C119599485","wikidata":"https://www.wikidata.org/wiki/Q43035","display_name":"Electrical engineering","level":1,"score":0.31021708250045776},{"id":"https://openalex.org/C172385210","wikidata":"https://www.wikidata.org/wiki/Q5339","display_name":"Transistor","level":3,"score":0.24803012609481812},{"id":"https://openalex.org/C127413603","wikidata":"https://www.wikidata.org/wiki/Q11023","display_name":"Engineering","level":0,"score":0.22688516974449158},{"id":"https://openalex.org/C11413529","wikidata":"https://www.wikidata.org/wiki/Q8366","display_name":"Algorithm","level":1,"score":0.101056307554245},{"id":"https://openalex.org/C199360897","wikidata":"https://www.wikidata.org/wiki/Q9143","display_name":"Programming language","level":1,"score":0.0}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/a-sscc47793.2019.9056926","is_oa":false,"landing_page_url":"https://doi.org/10.1109/a-sscc47793.2019.9056926","pdf_url":null,"source":null,"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"2019 IEEE Asian Solid-State Circuits Conference (A-SSCC)","raw_type":"proceedings-article"}],"best_oa_location":null,"sustainable_development_goals":[{"display_name":"Affordable and clean energy","id":"https://metadata.un.org/sdg/7","score":0.8999999761581421}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":0,"referenced_works":[],"related_works":["https://openalex.org/W2108719777","https://openalex.org/W2910771446","https://openalex.org/W2966758645","https://openalex.org/W2122693377","https://openalex.org/W2559054477","https://openalex.org/W4320854861","https://openalex.org/W3048955117","https://openalex.org/W2532170798","https://openalex.org/W2166656370","https://openalex.org/W2119025037"],"abstract_inverted_index":{"This":[0],"work":[1],"proposes":[2],"an":[3,52],"SRAM-based":[4],"mixed-signal":[5,24],"in-memory":[6],"computing":[7,26],"macro":[8,19],"using":[9],"a":[10,15,48,57],"pseudo-differential":[11,58],"voltage-mode":[12],"accumulator":[13],"and":[14,39,56,67],"row-by-row":[16],"ADC.":[17],"The":[18],"consists":[20],"of":[21,47],"128":[22,30],"parallel":[23],"dot-product":[25],"units,":[27],"each":[28],"with":[29,74],"bitcells":[31],"(64":[32],"for":[33,36,41],"synapses,":[34],"32":[35,40],"ADC":[37,76],"reference,":[38],"offset":[42],"calibration).":[43],"A":[44,62],"bitcell":[45],"comprises":[46],"6T":[49],"SRAM":[50],"cell,":[51],"XNOR-based":[53],"binary":[54],"multiplier,":[55],"voltage":[59],"-mode":[60],"driver.":[61],"65nm":[63],"test-chip":[64],"is":[65,72],"fabricated,":[66],"the":[68],"measured":[69],"energy":[70],"efficiency":[71],"87TOPS/W":[73],"5bit":[75],"at":[77],"0.5V":[78],"supply.":[79]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2024,"cited_by_count":2},{"year":2023,"cited_by_count":10},{"year":2022,"cited_by_count":12},{"year":2021,"cited_by_count":7},{"year":2020,"cited_by_count":5}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}