{"id":"https://openalex.org/W2071738775","doi":"https://doi.org/10.1109/54.953270","title":"Automating the design of SOCs using cores","display_name":"Automating the design of SOCs using cores","publication_year":2001,"publication_date":"2001-01-01","ids":{"openalex":"https://openalex.org/W2071738775","doi":"https://doi.org/10.1109/54.953270","mag":"2071738775"},"language":"en","primary_location":{"id":"doi:10.1109/54.953270","is_oa":false,"landing_page_url":"https://doi.org/10.1109/54.953270","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"},"type":"article","indexed_in":["crossref"],"open_access":{"is_oa":false,"oa_status":"closed","oa_url":null,"any_repository_has_fulltext":false},"authorships":[{"author_position":"first","author":{"id":"https://openalex.org/A5071441866","display_name":"Reinaldo A. Bergamaschi","orcid":null},"institutions":[],"countries":[],"is_corresponding":true,"raw_author_name":"R.A. Bergamaschi","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5008567256","display_name":"Sandip Bhattacharya","orcid":"https://orcid.org/0000-0002-3968-2681"},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"S. Bhattacharya","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5043933107","display_name":"R.J. Wagner","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"R. Wagner","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5082825372","display_name":"C. Fellenz","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"C. Fellenz","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5089085421","display_name":"M. Muhlada","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"M. Muhlada","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5049459549","display_name":"F. White","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"F. White","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"middle","author":{"id":"https://openalex.org/A5111650339","display_name":"J.M. Daveau","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"J.-M. Daveau","raw_affiliation_strings":[],"affiliations":[]},{"author_position":"last","author":{"id":"https://openalex.org/A5003003462","display_name":"W.R. Lee","orcid":null},"institutions":[],"countries":[],"is_corresponding":false,"raw_author_name":"W.R. Lee","raw_affiliation_strings":[],"affiliations":[]}],"institutions":[],"countries_distinct_count":0,"institutions_distinct_count":8,"corresponding_author_ids":["https://openalex.org/A5071441866"],"corresponding_institution_ids":[],"apc_list":null,"apc_paid":null,"fwci":8.9676,"has_fulltext":false,"cited_by_count":83,"citation_normalized_percentile":{"value":0.9815105,"is_in_top_1_percent":false,"is_in_top_10_percent":true},"cited_by_percentile_year":{"min":89,"max":97},"biblio":{"volume":"18","issue":"5","first_page":"32","last_page":"45"},"is_retracted":false,"is_paratext":false,"is_xpac":false,"primary_topic":{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},"topics":[{"id":"https://openalex.org/T10363","display_name":"Low-power high-performance VLSI design","score":0.9998999834060669,"subfield":{"id":"https://openalex.org/subfields/2208","display_name":"Electrical and Electronic Engineering"},"field":{"id":"https://openalex.org/fields/22","display_name":"Engineering"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T11032","display_name":"VLSI and Analog Circuit Testing","score":0.9998000264167786,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}},{"id":"https://openalex.org/T10904","display_name":"Embedded Systems Design Techniques","score":0.9993000030517578,"subfield":{"id":"https://openalex.org/subfields/1708","display_name":"Hardware and Architecture"},"field":{"id":"https://openalex.org/fields/17","display_name":"Computer Science"},"domain":{"id":"https://openalex.org/domains/3","display_name":"Physical Sciences"}}],"keywords":[{"id":"https://openalex.org/keywords/embedded-system","display_name":"Embedded system","score":0.6923054456710815},{"id":"https://openalex.org/keywords/computer-science","display_name":"Computer science","score":0.6714987754821777},{"id":"https://openalex.org/keywords/system-on-a-chip","display_name":"System on a chip","score":0.6641623973846436},{"id":"https://openalex.org/keywords/process","display_name":"Process (computing)","score":0.5469390153884888},{"id":"https://openalex.org/keywords/chip","display_name":"Chip","score":0.4862150251865387},{"id":"https://openalex.org/keywords/electronic-design-automation","display_name":"Electronic design automation","score":0.4751662611961365},{"id":"https://openalex.org/keywords/computer-architecture","display_name":"Computer architecture","score":0.42167460918426514},{"id":"https://openalex.org/keywords/operating-system","display_name":"Operating system","score":0.21402442455291748},{"id":"https://openalex.org/keywords/telecommunications","display_name":"Telecommunications","score":0.07732221484184265}],"concepts":[{"id":"https://openalex.org/C149635348","wikidata":"https://www.wikidata.org/wiki/Q193040","display_name":"Embedded system","level":1,"score":0.6923054456710815},{"id":"https://openalex.org/C41008148","wikidata":"https://www.wikidata.org/wiki/Q21198","display_name":"Computer science","level":0,"score":0.6714987754821777},{"id":"https://openalex.org/C118021083","wikidata":"https://www.wikidata.org/wiki/Q610398","display_name":"System on a chip","level":2,"score":0.6641623973846436},{"id":"https://openalex.org/C98045186","wikidata":"https://www.wikidata.org/wiki/Q205663","display_name":"Process (computing)","level":2,"score":0.5469390153884888},{"id":"https://openalex.org/C165005293","wikidata":"https://www.wikidata.org/wiki/Q1074500","display_name":"Chip","level":2,"score":0.4862150251865387},{"id":"https://openalex.org/C64260653","wikidata":"https://www.wikidata.org/wiki/Q1194864","display_name":"Electronic design automation","level":2,"score":0.4751662611961365},{"id":"https://openalex.org/C118524514","wikidata":"https://www.wikidata.org/wiki/Q173212","display_name":"Computer architecture","level":1,"score":0.42167460918426514},{"id":"https://openalex.org/C111919701","wikidata":"https://www.wikidata.org/wiki/Q9135","display_name":"Operating system","level":1,"score":0.21402442455291748},{"id":"https://openalex.org/C76155785","wikidata":"https://www.wikidata.org/wiki/Q418","display_name":"Telecommunications","level":1,"score":0.07732221484184265}],"mesh":[],"locations_count":1,"locations":[{"id":"doi:10.1109/54.953270","is_oa":false,"landing_page_url":"https://doi.org/10.1109/54.953270","pdf_url":null,"source":{"id":"https://openalex.org/S73404582","display_name":"IEEE Design & Test of Computers","issn_l":"0740-7475","issn":["0740-7475","1558-1918"],"is_oa":false,"is_in_doaj":false,"is_core":true,"host_organization":"https://openalex.org/P4310319808","host_organization_name":"Institute of Electrical and Electronics Engineers","host_organization_lineage":["https://openalex.org/P4310319808"],"host_organization_lineage_names":["Institute of Electrical and Electronics Engineers"],"type":"journal"},"license":null,"license_id":null,"version":"publishedVersion","is_accepted":true,"is_published":true,"raw_source_name":"IEEE Design &amp; Test of Computers","raw_type":"journal-article"}],"best_oa_location":null,"sustainable_development_goals":[{"score":0.6700000166893005,"id":"https://metadata.un.org/sdg/8","display_name":"Decent work and economic growth"}],"awards":[],"funders":[],"has_content":{"grobid_xml":false,"pdf":false},"content_urls":null,"referenced_works_count":6,"referenced_works":["https://openalex.org/W828977299","https://openalex.org/W1870277761","https://openalex.org/W2020121212","https://openalex.org/W2080267935","https://openalex.org/W2107362542","https://openalex.org/W6639389524"],"related_works":["https://openalex.org/W2036806516","https://openalex.org/W1967394420","https://openalex.org/W2565425548","https://openalex.org/W2502691491","https://openalex.org/W2392009442","https://openalex.org/W2155685366","https://openalex.org/W2142443274","https://openalex.org/W13556768","https://openalex.org/W2912613323","https://openalex.org/W2100663632"],"abstract_inverted_index":{"Assembling":[0],"a":[1,4],"system":[2],"on":[3],"chip":[5],"using":[6],"IP":[7],"blocks":[8],"is":[9],"an":[10],"error-prone,":[11],"labor-intensive,":[12],"and":[13],"time-consuming":[14],"process.":[15],"Emerging":[16],"high-level":[17],"tools":[18],"can":[19],"help":[20],"by":[21],"automating":[22],"many":[23],"of":[24],"the":[25],"design":[26],"tasks.":[27]},"counts_by_year":[{"year":2025,"cited_by_count":1},{"year":2021,"cited_by_count":2},{"year":2020,"cited_by_count":3},{"year":2018,"cited_by_count":2},{"year":2015,"cited_by_count":2},{"year":2014,"cited_by_count":3},{"year":2013,"cited_by_count":1}],"updated_date":"2025-11-06T03:46:38.306776","created_date":"2025-10-10T00:00:00"}
